Patents by Inventor Koichiro Takei

Koichiro Takei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing a semiconductor device
    Patent number: 7601635
    Abstract: For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 ??cm.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: October 13, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kentaro Yamada, Masato Takahashi, Tatsuyuki Konagaya, Takeshi Katoh, Masaki Sakashita, Koichiro Takei, Yasuhiro Obara, Yoshio Fukayama
  • Method of manufacturing a semiconductor device
    Publication number: 20070259512
    Abstract: For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 ??cm.
    Type: Application
    Filed: July 3, 2007
    Publication date: November 8, 2007
    Inventors: Kentaro Yamada, Masato Takahashi, Tatsuyuki Konagaya, Takeshi Katoh, Masaki Sakashita, Koichiro Takei, Yasuhiro Obara, Yoshio Fukayama
  • Method of manufacturing a semiconductor device
    Patent number: 7256125
    Abstract: For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 ??cm.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: August 14, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kentaro Yamada, Masato Takahashi, Tatsuyuki Konagaya, Takeshi Katoh, Masaki Sakashita, Koichiro Takei, Yasuhiro Obara, Yoshio Fukayama
  • Method of manufacturing a semiconductor device
    Publication number: 20050048708
    Abstract: For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 ??cm.
    Type: Application
    Filed: August 23, 2004
    Publication date: March 3, 2005
    Applicant: Renesas Technology Corp.
    Inventors: Kentaro Yamada, Masato Takahashi, Tatsuyuki Konagaya, Takeshi Katoh, Masaki Sakashita, Koichiro Takei, Yasuhiro Obara, Yoshio Fukayama