Patents by Inventor Koji Hidaka

Koji Hidaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230066994
    Abstract: Provided is an information processing system including: a target person information reception unit configured to receive target person information including information related to a state of a target person and a situation in a periphery of the target person from an image capturing apparatus; a target person information analysis unit configured to analyze the target person information; and a notification processing execution unit configured to execute notification processing based on an analysis result obtained by the target person information analysis unit. Provided is an information processing method executed by a computer, including: receiving target person information including information related to a state of a target person and a situation in a periphery of the target person from an image capturing apparatus; analyzing the target person information; and executing notification processing based on an analysis result obtained in the analyzing of the target person information.
    Type: Application
    Filed: November 7, 2022
    Publication date: March 2, 2023
    Inventors: Yoshihiro ENDO, Koji HIDAKA, Naohiro AKIYAMA, Masanori TANZAWA, Junichiro MAMIYA
  • Publication number: 20220358550
    Abstract: An information processing apparatus according to the present application includes a use-condition acquiring unit, an image acquiring unit, a reservation-information acquiring unit, and a selecting unit. The use-condition acquiring unit acquires a use condition of the store. The image acquiring unit acquires an image obtained by capturing an inside of the store. The reservation-information acquiring unit acquires reservation information of the store. The selecting unit selects a store estimated to be usable on a date and time indicated in the use condition based on the acquired image of the store and the reservation information of the store.
    Type: Application
    Filed: December 23, 2020
    Publication date: November 10, 2022
    Applicant: SoftBank Corp.
    Inventors: Yoshihiro ENDO, Masanori TANZAWA, Koji HIDAKA, Naohiro AKIYAMA, Junichiro MAMIYA
  • Patent number: 11049976
    Abstract: A thin-film transistor according to an embodiment of the present invention includes: a gate electrode; an active layer formed of an oxide containing indium, zinc, and titanium; a gate insulating film formed between the gate electrode and the active layer; and a source electrode and a drain electrode that are electrically connected to the active layer. Atomic proportions of elements relative to the total quantity of indium, zinc, and titanium that constitute the oxide may be not less than 24 at. % and not more than 80 at. % for indium, not less than 16 at. % and not more than 70 at. % for zinc, and not less than 0.1 at. % and not more than 20 at. % for titanium.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: June 29, 2021
    Assignee: ULVAC, INC.
    Inventors: Mitsuru Ueno, Junya Kiyota, Motoshi Kobayashi, Masaki Takei, Kazutoshi Takahashi, Koji Hidaka, Yuu Kawagoe, Kentarou Takesue, Masaru Wada
  • Publication number: 20180355472
    Abstract: An oxide-sintered-body sputtering target according to an embodiment of the present invention is formed of a sintered body containing an indium oxide, a zinc oxide, a titanium oxide, and a zirconium oxide, an atomic ratio of titanium with respect to a sum of indium, zinc, and titanium being not less than 0.1% and not more than 20%, a weight ratio of zirconium with respect to a sum of the indium oxide, the zinc oxide, the titanium oxide, and the zirconium oxide being not less than 10 ppm and not more than 2,000 ppm.
    Type: Application
    Filed: December 21, 2016
    Publication date: December 13, 2018
    Applicant: ULVAC, INC.
    Inventors: KAZUTOSHI TAKAHASHI, KOJI HIDAKA, YUU KAWAGOE, KENTAROU TAKESUE, MASARU WADA, MITSURU UENO, JUNYA KIYOTA, MOTOSHI KOBAYASHI, MASAKI TAKEI
  • Publication number: 20180337285
    Abstract: A thin-film transistor according to an embodiment of the present invention includes: a gate electrode; an active layer formed of an oxide containing indium, zinc, and titanium; a gate insulating film formed between the gate electrode and the active layer; and a source electrode and a drain electrode that are electrically connected to the active layer. Atomic proportions of elements relative to the total quantity of indium, zinc, and titanium that constitute the oxide may be not less than 24 at. % and not more than 80 at. % for indium, not less than 16 at. % and not more than 70 at. % for zinc, and not less than 0.1 at. % and not more than 20 at. % for titanium.
    Type: Application
    Filed: November 22, 2016
    Publication date: November 22, 2018
    Inventors: MITSURU UENO, JUNYA KIYOTA, MOTOSHI KOBAYASHI, MASAKI TAKEI, KAZUTOSHI TAKAHASHI, KOJI HIDAKA, YUU KAWAGOE, KENTAROU TAKESUE, MASARU WADA
  • Patent number: 10082702
    Abstract: A liquid-crystal display apparatus includes a plurality of rectangular pixels. Each pixel includes a first electrode and a second electrode. A slit region and a concave and convex portion are formed in the first electrode. It further includes a control circuit. The plurality of pixels are constituted of a first pixel group and a second pixel group. First data lines and for applying a voltage on the first electrode are provided closer to the first substrate than the first electrode. In each pixel that constitutes the first pixel group, a second data line extension extending from a second data line is provided adjacent to a first data line. In each pixel that constitutes the second pixel group, a first data line extension extending from the first data line is provided adjacent to the second data line.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: September 25, 2018
    Assignee: Sony Corporation
    Inventors: Chikashi Kobayashi, Shunichi Suwa, Masashi Miyakawa, Yoji Nagase, Sumito Shiina, Seiji Shibahara, Hiroki Takahashi, Hiromasa Mitani, Kunihiko Nagamine, Koji Hidaka, Masahiko Mizuki
  • Publication number: 20170285410
    Abstract: A liquid-crystal display apparatus includes a plurality of rectangular pixels 10. Each pixel 10 includes a first electrode 22 and a second electrode. A slit region and a concave and convex portion are formed in the first electrode 22. It further includes a control circuit. The plurality of pixels are constituted of a first pixel group and a second pixel group. First data lines 41 and 42 for applying a voltage on the first electrode 22 are provided closer to the first substrate than the first electrode 22. In each pixel that constitutes the first pixel group, a second data line extension 42A extending from a second data line 42 is provided adjacent to a first data line 41. In each pixel that constitutes the second pixel group, a first data line extension 41A extending from the first data line 41 is provided adjacent to the second data line 42.
    Type: Application
    Filed: August 7, 2015
    Publication date: October 5, 2017
    Applicant: Sony Corporation
    Inventors: CHIKASHI KOBAYASHI, SHUNICHI SUWA, MASASHI MIYAKAWA, YOJI NAGASE, SUMITO SHIINA, SEIJI SHIBAHARA, HIROKI TAKAHASHI, HIROMASA MITANI, KUNIHIKO NAGAMINE, KOJI HIDAKA, MASAHIKO MIZUKI
  • Patent number: 7455441
    Abstract: A linear light source includes light emitting elements 5 which are arranged on a square rod-shaped printed board 4 along the longitudinal direction thereof and reflectors 6 which are arranged alternately with the light emitting elements 5. The opposing surfaces 6a of the reflectors 6 sandwiching the light emitting element are inclined such that the distance between the opposing surfaces of the reflectors increases in the direction of light emitted from the light emitting element 5. The linear light source further includes resin seal layers 10 which are in the form of a trapezoidal prism or a truncated pyramid and formed by filling recesses, each of which is defined by the printed board 4, light emitting element 5 and reflectors 6, with a light-transmissive resin sealant. A strip-shaped reflection member made of a reflection sheet 1 or a vapor-deposited film 12 is arranged to cover a region ranging from the end face of the printed board 4 adjoining to the component side to the tips of the reflectors 6.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: November 25, 2008
    Assignee: Panasonic Corporation
    Inventors: Yoshihiko Chosa, Tadaaki Ikeda, Koji Hidaka
  • Publication number: 20070109792
    Abstract: A linear light source includes light emitting elements 5 which are arranged on a square rod-shaped printed board 4 along the longitudinal direction thereof and reflectors 6 which are arranged alternately with the light emitting elements 5. The opposing surfaces 6a of the reflectors 6 sandwiching the light emitting element are inclined such that the distance between the opposing surfaces of the reflectors increases in the direction of light emitted from the light emitting element 5. The linear light source further includes resin seal layers 10 which are in the form of a trapezoidal prism or a truncated pyramid and formed by filling recesses, each of which is defined by the printed board 4, light emitting element 5 and reflectors 6, with a light-transmissive resin sealant. A strip-shaped reflection member made of a reflection sheet 1 or a vapor-deposited film 12 is arranged to cover a region ranging from the end face of the printed board 4 adjoining to the component side to the tips of the reflectors 6.
    Type: Application
    Filed: January 14, 2004
    Publication date: May 17, 2007
    Inventors: Yoshihiko Chosa, Tadaaki Ikeda, Koji Hidaka
  • Patent number: 6373124
    Abstract: This invention prevents deterioration in characteristics of a semiconductor device having a lead frame that is thin and uniform in thickness. More specifically, this invention relieves resin distortion caused by a difference in thermal expansion coefficients between the lead frame and the sealing resin in order to prevent the characteristic deterioration caused by some factors such as moisture invasion from outside and mechanical pressure. A lead frame for a resin-sealed semiconductor device of this invention is composed of an element-mount part, a horizontal part for fixing the lead frame for resin sealing, and a central lead having side leads formed in parallel on both sides thereof. The element-mount part, the horizontal part and the central lead are formed integrally. In the lead frame, at least one pair of resin-anchoring parts are formed on two opposing sides on the periphery of the element-mount part.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: April 16, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Kato, Yasuhiko Yamamoto, Koji Hidaka
  • Patent number: 5686980
    Abstract: A light-shielding film, and a liquid crystal display device including the light-shielding film, and a material suitable for forming the light-shielding film. The light-shielding film includes at least a film prepared from an inorganic insulating material and fine particles of metal and/or semi-metal dispersed in the insulating material film. The liquid crystal display device includes a display pixel electrode array substrate, a counter substrate, and a liquid crystal layer interposed between the two substrates. The light-shielding film is formed on the display pixel electrode array substrate of the liquid crystal display device.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 11, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Hirayama, Nobuki Ibaraki, Koji Hidaka, Kiyotsugu Mizouchi, Michiya Kobayashi, Takashi Ishigami, Ryo Sakai, Makoto Kikuchi
  • Patent number: 5037780
    Abstract: A method for fabricating semiconductor devices comprising pressing first and second semiconductor devices against a transparent board at different times by means of first and second pressure tools that are separate from each other and move upward and downward independent of each other so that a difference in thickness between the devices and a deflection of the devices can be absorbed and a reliable electrical connection between the electrodes of the devices and the conductors of the board can be attained, which makes it possible to continuously achieve a highly dense assembly of semiconductor devices with a minute gap therebetween.
    Type: Grant
    Filed: February 1, 1990
    Date of Patent: August 6, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Kenzou Hatada, Yoshinobu Takeshita, Kazuya Otani, Koji Hidaka, Tsuguo Sakiyama