Patents by Inventor Koji Naniwada

Koji Naniwada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150092894
    Abstract: There is provided a receiving device including a receiving unit configured to receive encoded data encoded by one or more codes, a first decoding unit configured to decode the encoded data received by the receiving unit, a first delay unit configured to delay a part of decoding results obtained by the first decoding unit, and a reliability increasing unit configured to control decoding of the encoded data to increase reliability of the decoding results using a decoding result that is not delayed by the first delay unit among the decoding results after delay by the first delay unit.
    Type: Application
    Filed: May 22, 2013
    Publication date: April 2, 2015
    Inventors: Takashi Yokokawa, Yuji Shinohara, Koji Naniwada, Ryoji Ikegaya
  • Patent number: 8385396
    Abstract: The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before. In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventors: Kazuhisa Funamoto, Koji Naniwada, Tien Dzung Doan
  • Patent number: 8385480
    Abstract: Disclosed herein is a receiving apparatus including a first correlation value computation section, an operation section, a second correlation value computation section, a decoding section, and a determination section.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventors: Yuken Goto, Naoto Nagaki, Satoshi Okada, Kentaro Nakahara, Koji Naniwada
  • Patent number: 8290099
    Abstract: Disclosed herein is a phase noise limiting apparatus including a detection section configured to detect a phase noise quantity from an input signal; a determination section configured such that furnished with a plurality of correspondence tables indicating parameters used for phase synchronization with the input signal, the determination section determines one of the parameters in keeping with the phase noise quantity detected by the detection section on the basis of one of the plurality of correspondence tables; and a phase noise limitation section configured to limit the phase noise in the input signal based on the parameter determined by the determination section.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: October 16, 2012
    Assignee: Sony Corporation
    Inventor: Koji Naniwada
  • Patent number: 8268660
    Abstract: A method for manufacturing a micromachine is provided which can remove a sacrifice layer and can perform sealing without using a specific packaging technique. In a method for manufacturing a micromachine (1) including an oscillator (4), a step of forming a sacrifice layer around a movable portion of the oscillator (4); a step of covering a sacrifice layer with an overcoat film (8), followed by the formation of a penetrating hole (10) reaching the sacrifice layer in the overcoat layer (8); a step of performing sacrifice-layer etching for removing the sacrifice layer using the penetrating hole (10) in order to form a space around the movable portion; and a step of performing a film-formation treatment at a reduced pressure following the sacrifice-layer etching so as to seal the penetrating hole (10).
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: September 18, 2012
    Assignee: Sony Corporation
    Inventors: Masahiro Tada, Takashi Kinoshita, Masahiro Tanaka, Masanari Yamaguchi, Shun Mitarai, Koji Naniwada
  • Patent number: 8170170
    Abstract: Disclosed herein is a carrier synchronizing circuit including at least frequency synchronizing means and phase synchronizing means. The phase synchronizing means includes residual frequency error detecting means for detecting a residual frequency error after a frequency synchronizing process by the frequency synchronizing means and supplying the residual frequency error to the frequency synchronizing means, and the frequency synchronizing means performs frequency pull-in for the residual frequency error supplied from the residual frequency error detecting means after first timing.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: May 1, 2012
    Assignee: Sony Corporation
    Inventors: Hideyuki Matsumoto, Tetsuhiro Futami, Koji Naniwada, Yuichi Hirayama
  • Patent number: 8045945
    Abstract: A reception apparatus including an extraction section; a transmission line characteristic estimation section; an interpolation section; a compensation section; a detection section; and a selection section.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: October 25, 2011
    Assignee: Sony Corporation
    Inventors: Hidetoshi Kawauchi, Tadaaki Yuba, Toshiyuki Miyauchi, Takashi Yokokawa, Takuya Okamoto, Tamotsu Ikeda, Koji Naniwada, Kazuhiro Shimizu, Lachlan Bruce Michael
  • Patent number: 8045658
    Abstract: A reception apparatus includes: an extraction section; a transmission line characteristic estimation section; an estimation section; a frequency shift amount production section; a control section; an addition section; a first frequency shifting section; a second frequency shifting section; an interpolation section; a compensation section; a detection section; and an operation section.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: October 25, 2011
    Assignee: Sony Corporation
    Inventors: Hidetoshi Kawauchi, Tadaaki Yuba, Tamotsu Ikeda, Koji Naniwada, Kazuhiro Shimizu, Lachlan Bruce Michael
  • Patent number: 7893796
    Abstract: A high frequency device including an electrostatic type vibrator, a pad, and a circuit. The electrostatic type vibrator is operable via a DC bias voltage. The pad is configured to supply the DC bias voltage. The circuit is positioned electrically between the pad and the vibrator. The circuit is configured to stabilize the DC bias voltage. The circuit and the high frequency signal device are on a common substrate.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: February 22, 2011
    Assignee: Sony Corporation
    Inventors: Masahiro Tanaka, Shun Mitarai, Masahiro Tada, Koji Naniwada
  • Publication number: 20110038444
    Abstract: Disclosed herein is a receiving apparatus including a first correlation value computation section, an operation section, a second correlation value computation section, a decoding section, and a determination section.
    Type: Application
    Filed: August 6, 2010
    Publication date: February 17, 2011
    Inventors: Yuken GOTO, Naoto Nagaki, Satoshi Okada, Kentaro Nakahara, Koji Naniwada
  • Publication number: 20100208787
    Abstract: The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before. In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.
    Type: Application
    Filed: August 6, 2008
    Publication date: August 19, 2010
    Inventors: Kazuhisa Funamoto, Koji Naniwada, Tien Dzung Doan
  • Publication number: 20090221254
    Abstract: A reception apparatus including an extraction section; a transmission line characteristic estimation section; an interpolation section; a compensation section; a detection section; and a selection section.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 3, 2009
    Inventors: Hidetoshi Kawauchi, Tadaaki Yuba, Toshiyuki Miyauchi, Takashi Yokokawa, Takuya Okamoto, Tamotsu Ikeda, Koji Naniwada, Kazuhiro Shimizu, Lachlan Bruce Michael
  • Publication number: 20090110127
    Abstract: A reception apparatus includes: an extraction section; a transmission line characteristic estimation section; an estimation section; a frequency shift amount production section; a control section; an addition section; a first frequency shifting section; a second frequency shifting section; an interpolation section; a compensation section; a detection section; and an operation section.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 30, 2009
    Inventors: Hidetoshi KAWAUCHI, Tadaaki YUBA, Tamotsu IKEDA, Koji NANIWADA, Kazuhiro SHIMIZU, Lachlan Bruce MICHAEL
  • Patent number: 7517711
    Abstract: A MEMS resonator and a method for manufacturing thereof are provided, in which an adsorption of a beam into a substrate in a wet process when manufacturing a MEMS is prevented and other oscillation modes, which are unnecessary, than a required oscillation mode are not mixed at the time of operation. Further, a communication apparatus including a filter that has the MEMS resonator is provided. The MEMS resonator includes a substrate in which a lower electrode is formed and a beam formed on the substrate, in which at least one support column is provided between the substrate and the beam. As a filter, the communication apparatus includes a filter of the above MEMS resonator.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: April 14, 2009
    Assignee: Sony Corporation
    Inventor: Koji Naniwada
  • Publication number: 20090080578
    Abstract: Disclosed herein is a phase noise limiting apparatus including a detection section configured to detect a phase noise quantity from an input signal; a determination section configured such that furnished with a plurality of correspondence tables indicating parameters used for phase synchronization with the input signal, the determination section determines one of the parameters in keeping with the phase noise quantity detected by the detection section on the basis of one of the plurality of correspondence tables; and a phase noise limitation section configured to limit the phase noise in the input signal based on the parameter determined by the determination section.
    Type: Application
    Filed: September 24, 2008
    Publication date: March 26, 2009
    Inventor: Koji NANIWADA
  • Patent number: 7498901
    Abstract: A filter device configured with a plurality of micro-resonators and having a wide specific bandwidth. The filter device is configured as having a plurality of beam-structured, micro-resonators (15), (16), (17), (18) electrically connected in a lattice-forming manner between two input terminals (11), (12) for balanced input and two output terminals (13), (14) for balanced output, each of the plurality of micro-resonators (15), (16), (17), (18) being composed of a resonator group including a plurality of resonators differed in resonance frequency.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: March 3, 2009
    Assignee: Sony Corporation
    Inventors: Koji Naniwada, Shun Mitarai, Masahiro Tanaka, Masahiro Tada
  • Patent number: 7463116
    Abstract: A highly reliable micro-resonator and communication apparatus is provided in which an influence on a substrate caused by an interaction generated by an oscillation between adjacent micro-resonant elements is eliminated. The micro-resonant element includes a plurality of micro-resonant elements using a micro-mechanical oscillation provided on the same substrate, in which a micro-resonant element to oscillate in a first phase and a micro-resonant element to oscillate in a second phase that is a reverse phase to the first phase are disposed to be a pair.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: December 9, 2008
    Assignee: Sony Corporation
    Inventor: Koji Naniwada
  • Publication number: 20080272749
    Abstract: The present invention provides a high frequency device in which stabilization of a DC bias voltage applied to an electrostatic drive type vibrator is attempted and a power supply device which can supply a stable DC bias voltage. Also, the present invention provides a communication apparatus including a filter by means of aforesaid high frequency device. The high frequency device of the present invention has a high frequency signal device which includes an electrostatic type vibrator operated by being applied with a DC bias voltage and is formed by being added with a circuit having a function of stabilizing the DC bias voltage between a pad supplying the DC bias voltage and the vibrator. The power supply device is a power supply device serving for a drive of a high frequency vibration device and is formed by being added with a circuit having a function of stabilizing a DC bias voltage.
    Type: Application
    Filed: June 7, 2005
    Publication date: November 6, 2008
    Inventors: Masahiro Tanaka, Shun Mitarai, Masahiro Tada, Koji Naniwada
  • Publication number: 20080260086
    Abstract: Disclosed herein is a carrier synchronizing circuit including at least frequency synchronizing means and phase synchronizing means. The phase synchronizing means includes residual frequency error detecting means for detecting a residual frequency error after a frequency synchronizing process by the frequency synchronizing means and supplying the residual frequency error to the frequency synchronizing means, and the frequency synchronizing means performs frequency pull-in for the residual frequency error supplied from the residual frequency error detecting means after first timing.
    Type: Application
    Filed: April 17, 2008
    Publication date: October 23, 2008
    Inventors: Hideyuki MATSUMOTO, Tetsuhiro Futami, Koji Naniwada, Yuichi Hirayama
  • Patent number: 7286027
    Abstract: The present invention provides a microresonator including a plurality of resonator elements arranged on a plurality of columns on a substrate. The resonator elements each have an input electrode, an output electrode, and a diaphragm that extends in a certain direction, and each pass a signal of a certain frequency. The plurality of resonator elements includes a plurality of first resonator elements arranged on first columns that are located on every other column of the plurality of columns, and having a first phase, and a plurality of second resonator elements arranged on second columns that are located on every other column, other than the first columns, of the plurality of columns, and having a second phase that is an opposite phase of the first phase.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: October 23, 2007
    Assignee: Sony Corporation
    Inventors: Masahiro Tada, Masahiro Tanaka, Shun Mitarai, Koji Naniwada