Patents by Inventor Koji Nasu

Koji Nasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088847
    Abstract: An amplification circuit includes an amplification transistor connected to a signal input terminal, a power supply circuit configured to supply a bias voltage to the amplification transistor, a resistor disposed in series to a bias path connecting the power supply circuit and the amplification transistor, a transistor that is connected to the bias path and the power supply circuit and that is a simulated transistor for the amplification transistor, and a detection diode connected to the signal input terminal and the bias path between the resistor and a gate of the amplification transistor.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 14, 2024
    Inventors: Yasutaka SUGIMOTO, Koji NASU
  • Publication number: 20230070816
    Abstract: An amplifier circuit includes an amplifier and a bias circuit. The bias circuit includes a bias transistor having a base terminal and a collector terminal, a transistor having a gate terminal, a source terminal, and a drain terminal, a transistor having a gate terminal, a source terminal, and a drain terminal, resistors, and a current source. The source terminals are connected to a power source. One end portion of the resistor is connected to the base terminal, the other end portion of the resistor is connected to the drain terminal, one end portion of the resistor is connected to the other end portion of the resistor, the other end portion of the resistor is connected to the bias output terminal, and the bias circuit further includes a feedback circuit that controls the electric potential of the base terminal based on the electric potential of the collector terminal.
    Type: Application
    Filed: October 27, 2022
    Publication date: March 9, 2023
    Inventor: Koji NASU
  • Patent number: 7227709
    Abstract: To calibrate the VGA of a read head, test signals from a DAC are input to the VGA and the output of the VGA is observed, with the gain of the VGA being adjusted as appropriate. So that the DAC need not be made with tight tolerances, a DC signal can be fed into the DAC prior to VGA calibration, and an auxiliary ADC is used to receive the output of the DAC and to determine, for a given DC input, what the signal produced by the DAC actually is. In this way, during subsequent VGA calibration the test signal from the DAC is known not by virtue of the DAC having a tight manufacturing tolerance but by virtue of the actual measurements of its outputs for given register inputs.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: June 5, 2007
    Assignees: Hitachi Global Storage Technologies Netherlands B.V., Renesas Technology Corporation
    Inventors: Vicki Lynn Pipal, Michael William Curtis, Raymond Alan Richetta, Koji Nasu
  • Patent number: 7187956
    Abstract: In a portable communication apparatus of the invention, an inner wall (22) of an openable/closable member (2) faces the front face of a diaphragm of a close-talking microphone (5) via a sound path (64), and an outer sound hole (27) faces the rear face of the diaphragm of the close-talking microphone (5) via a sound path (65). An inner sound hole (26) is biasedly located in a position which is close to a free end of the openable/closable member (2), and the outer sound hole (27) is biasedly located in a position which is close to the center position of opening and closing movements of the openable/closable member (2), thereby obtaining a speech quality of a very high S/N ratio at a substantially same degree in both the cases where the openable/closable member (2) is opened, and where the member is closed.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: March 6, 2007
    Assignee: Hosiden Corporation
    Inventors: Shigeru Sugino, Kouji Saitou, Toshiya Inubushi, Shushin Noda, Koji Nasu, Tomohiko Kamimura
  • Publication number: 20030064687
    Abstract: In a portable communication apparatus of the invention, an inner wall (22) of an openable/closable member (2) faces the front face of a diaphragm of a close-talking microphone (5) via a sound path (64), and an outer sound hole (27) faces the rear face of the diaphragm of the close-talking microphone (5) via a sound path (65). An inner sound hole (26) is biasedly located in a position which is close to a free end of the openable/closable member (2), and the outer sound hole (27) is biasedly located in a position which is close to the center position of opening and closing movements of the openable/closable member (2), thereby obtaining a speech quality of a very high S/N ratio at a substantially same degree in both the cases where the openable/closable member (2) is opened, and where the member is closed.
    Type: Application
    Filed: September 17, 2002
    Publication date: April 3, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Sugino, Kouji Saitou, Toshiya Inubushi, Shushin Noda, Koji Nasu, Tomohiko Kamimura
  • Patent number: 6526635
    Abstract: A cord clip for fastening a cord attached to e.g. an earphone to an object such as a clothes is disclosed. The cord clip includes a clipping portion for clamping the object and a cord holding portion for holding the cord. The clipping portion is formed by a first annular portion having a discontinuity at a part thereof. The clipping portion is capable of clamping the object at a clamping portion thereof provided by a narrow gap formed by the discontinuity of the first annular portion by means of an elastic resilient force of the first annular portion. The cord holding portion is formed by a second annular portion having a discontinuity at a part thereof. The cord holding portion is capable of holding the cord therein by means of an elastic resilient force of the second annular portion. This elastic resilient force of the second annular portion is independent of that of the first annular portion. The first annular portion and the second annular portion are formed integrally in a single member.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: March 4, 2003
    Assignee: Hosiden Corporation
    Inventors: Koji Nasu, Satoru Fujiwara
  • Patent number: 6438248
    Abstract: A hand-free apparatus having improved portability is disclosed. The apparatus includes an apparatus body including a transmitter and a receiver, an input/output cable connected with the transmitter and the receiver and extending outside from the apparatus body, a cable case incorporating a cable spool capable of taking up the cable and a retaining member capable of detachably retaining the apparatus body on the cable case. The apparatus body when retained by the retaining member extends along a peripheral face of the cable spool.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: August 20, 2002
    Assignee: Hosiden Corporation
    Inventors: Tomohiko Kamimura, Satoru Fujiwara, Koji Nasu, Shingo Sato
  • Patent number: 6353337
    Abstract: An output buffer includes a reference capacitor; a constant current source connected in series with the reference capacitor, for generating a reference voltage with a constant gradient by charging the reference capacitor; a first transistor having its source connected to a capacitive load, and its gate connected to the connecting point of the reference capacitor and the first constant current source to be supplied with the reference voltage; a second transistor connected between the drain of the first transistor and a voltage source; a third transistor connected between the capacitive load and the voltage source; and a fourth transistor connected to the control terminal of the second transistor and to the control terminal of the third transistor, for switching the second and third transistors from an OFF state to an ON state when the first transistor is turned on.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: March 5, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Koji Nasu, Kiyoshi Adachi
  • Publication number: 20020020045
    Abstract: A cord clip for fastening a cord attached to e.g. an earphone to an object such as a clothes is disclosed. The cord clip includes a clipping portion for clamping the object and a cord holding portion for holding the cord. The clipping portion is formed by a first annular portion having a discontinuity at a part thereof. The clipping portion is capable of clamping the object at a clamping portion thereof provided by a narrow gap formed by the discontinuity of the first annular portion by means of an elastic resilient force of the first annular portion. The cord holding portion is formed by a second annular portion having a discontinuity at a part thereof. The cord holding portion is capable of holding the cord therein by means of an elastic resilient force of the second annular portion. This elastic resilient force of the second annular portion is independent of that of the first annular portion. The first annular portion and the second annular portion are formed integrally in a single member.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 21, 2002
    Applicant: Hosiden Corporation
    Inventors: Koji Nasu, Satoru Fujiwara
  • Publication number: 20020008543
    Abstract: An output buffer includes a reference capacitor; a constant current source connected in series with the reference capacitor, for generating a reference voltage with a constant gradient by charging the reference capacitor; a first transistor having its source connected to a capacitive load, and its gate connected to the connecting point of the reference capacitor and the first constant current source to be supplied with the reference voltage; a second transistor connected between the drain of the first transistor and a voltage source; a third transistor connected between the capacitive load and the voltage source; and a fourth transistor connected to the control terminal of the second transistor and to the control terminal of the third transistor, for switching the second and third transistors from an OFF state to an ON state when the first transistor is turned on.
    Type: Application
    Filed: December 19, 2000
    Publication date: January 24, 2002
    Inventors: Koji Nasu, Kiyoshi Adachi
  • Patent number: 6215328
    Abstract: A buffer circuit including a pair of complementary P-channel transistor and N-channel transistor connected in series, the connecting point of which is connected to an output terminal. The gate terminal of the P-channel transistor is connected to a power supply when the input signal is a low level, and to the output terminal when the input signal is a high level. The gate terminal of the N-channel transistor is connected to the output terminal when the input signal is the low level, and to a ground when the input signal is the high level. This makes it possible to solve a problem of a conventional buffer circuit in that an increasing capacity of a load connected to an output terminal increases a delay time between a time the input signal changes to the high level and a time the output signal changes to the high level.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: April 10, 2001
    Assignees: Mitsubishi Electric System LSI Design Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventor: Koji Nasu
  • Patent number: 6124747
    Abstract: An output buffer circuit capable of controlling a through rate at a constant rate. Each decision circuit of a plurality of decision circuits (11-13, 18-20) receives a voltage potential from an output terminal (10) and compares it with a respective predetermined voltage value. Flip flops (15-17) with an asynchronous set function or flip flops (22-24) with an asynchronous reset function receive respective comparison results as decision results when receiving a respective trigger signal from a respective delay circuit from a plurality of delay circuits (14, 21) after the elapse of a respective predetermined time period from a time at which an input terminal (1) receives a H level control signal or an L level control signal. The flip flops (15-17 and 22-24) control the operation of output transistors (3-5 and 7-9) based on the respective decision results.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: September 26, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Koji Nasu
  • Patent number: 5366549
    Abstract: A method is provided for making a fiber-reinforced slag gypsum cement lightweight hardened product. The method consists essentially of mixing (1) from 5 to 140 parts by weight of aggregates having a maximum size of not larger than 2000 .mu.m to (2) 100 parts by weight of a mixture which comprises 100 parts by weight of Portland cement, (3) from 20 to 350 parts by weight of slag fine powder which has a fineness ranging from 6,000 to 12,000 cm.sup.2 /g as Blaine's specific surface area, (4) from 0 to 20 parts by weight of lime, (5) from 20 to 100 parts by weight of calcium aluminate and gypsum fine powder, (6) 0.01 to 1.5 parts of a setting retardant; mixing water, prefoamed foams and reinforcing fibers with the mixture to obtain a slurry; subjecting the slurry to molding to obtain a molded product; removing the molded product to obtain a hardened product; and curing the hardened product with steam.
    Type: Grant
    Filed: March 24, 1994
    Date of Patent: November 22, 1994
    Assignees: Kyowa Giken Co., Ltd., Takeda Chemical Industries, Ltd., Dai-Ichi Cement Co., Ltd., Naigai Technos Corporation, Obayashi Corporation
    Inventors: Shokichi Imaizumi, Tsuyoshi Aoyama, Nagao Hori, Katsumi Takenami, Kiyoshi Koibuchi, Youich Ishikawa, Seiji Kazama, Koji Nasu
  • Patent number: 4478894
    Abstract: Disclosed are a thermosetting polyurethane coating composition of one-pack type which comprises a product obtained by reacting (i) an isocyanate component having at least one oxadiazinetrione ring obtained by the reaction of bis(isocyanatomethyl)cyclohexane with carbon dioxide with (ii) a polyol component having a molecular weight of 400 to 50,000 at such a proportion as satisfying the relations: the number of hydroxyl group > the number of free isocyanate group and the number of oxadiazinetrione ring/(the number of hydroxyl group--the number of free isocyanate group)=0.1 to 10 and a process for producing the coating composition.The composition has excellent storage stability and the cured coatings have no problems of yellowing and pin-holes and are excellent in mechanical properties, chemical resistance and weather resistance.
    Type: Grant
    Filed: November 29, 1982
    Date of Patent: October 23, 1984
    Assignee: Takeda Chemical Industries, Inc.
    Inventors: Michio Tanaka, Yoshio Kamatani, Koji Nasu
  • Patent number: 4474934
    Abstract: Disclosed is a thermosetting polyurethane coating composition of one-pack type which comprises (1) a compound having at least one NCO group blocked with an alcohol, lactam or oxime blocking agent and at least one oxadiazine-2,4,6-trione ring and (2) a polyol having a molecular weight of 400 to 50,000. The composition has good storage stability and provides coating films having no problems such as yellowing and pin-holes and excellent in mechanical properties, chemical resistance and weather resistance.
    Type: Grant
    Filed: November 29, 1982
    Date of Patent: October 2, 1984
    Assignee: Takeda Chemical Industries, Ltd.
    Inventors: Michio Tanaka, Yoshio Kamatani, Koji Nasu