Abstract: A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm?3 or more to 5×1016 cm?3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.

Abstract: A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm?3 or more to 5×1016 cm?3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.

Abstract: A vertical cavity surface emitting laser includes: an active layer; a first laminate for a first distributed Bragg reflector; and a first intermediate layer disposed between the active layer and the first laminate. The first intermediate layer has first and second portions. The first laminate, the first and second portions of the first intermediate layer, and the active layer are arranged along a direction of a first axis. The first laminate and the first portion of the first intermediate layer each include a first dopant. The active layer has a first-dopant concentration of less than 1×1016 cm?3. The first portion of the first intermediate layer has a first-dopant concentration smaller than that of the first laminate. The second portion of the first intermediate layer has a first-dopant concentration smaller than that of the first portion of the first intermediate layer.

Abstract: A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2?d1)/d1 is ?3×10?3 or more and 3×10?3 or less, and (d3?d1)/d1 is ?3×10?3 or more and 3×10?3 or less.

Abstract: A semiconductor layered structure includes a base layer, a quantum well structure, and a contact layer. The base layer, the quantum well structure, and the contact layer are disposed so as to be stacked in this order. In the contact layer, a region including a first main surface that is a main surface on a quantum well structure side has a p-type impurity concentration lower than a p-type impurity concentration of a region including a second main surface that is a main surface opposite to the first main surface. A photodiode includes the semiconductor layered structure and an electrode formed on the semiconductor layered structure. A sensor includes the photodiode and a read-out circuit connected to the photodiode.

Abstract: An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×1015 cm?3.

Abstract: A semiconductor layered structure according to the present invention includes a substrate formed of a III-V compound semiconductor; and semiconductor layers disposed on the substrate and formed of III-V compound semiconductors. The substrate has a majority-carrier-generating impurity concentration of 1×1017 cm?3 or more and 2×1020 cm?3 or less, and the impurity has an activation ratio of 30% or more.

Abstract: A light-receiving device includes: a group III-V compound semiconductor substrate having a first main surface; and a light-receiving layer formed on the first main surface, and the group III-V compound semiconductor substrate has a dislocation density of 10000 cm?2 or less. Accordingly, the light-receiving device with low dark current is provided.

Abstract: A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2?d1)/d1 is ?3×10?3 or more and 3×10?3 or less, and (d3?d1)/d1 is ?3×10?3 or more and 3×10?3 or less.

Abstract: An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×1015 cm?3.

Abstract: A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 ?m and less than or equal to 8 ?m, the semiconductor device having a dark current density of less than or equal to 1×10?1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of ?140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.

Abstract: A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 ?m and less than or equal to 8 ?m, the semiconductor device having a dark current density of less than or equal to 1×10?1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of ?140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.

Abstract: Provided is a Group III nitride semiconductor device, which comprises an electrically conductive substrate including a primary surface comprised of a first gallium nitride based semiconductor, and a Group III nitride semiconductor region including a first p-type gallium nitride based semiconductor layer and provided on the primary surface. The primary surface of the substrate is inclined at an angle in the range of not less than 50 degrees, and less than 130 degrees from a plane perpendicular to a reference axis extending along the c-axis of the first gallium nitride based semiconductor, an oxygen concentration Noxg of the first p-type gallium nitride based semiconductor layer is not more than 5×1017 cm?3, and a ratio (Noxg/Npd) of the oxygen concentration Noxg to a p-type dopant concentration Npd of the first p-type gallium nitride based semiconductor layer is not more than 1/10.

Abstract: Provided is a Group III nitride semiconductor device, which comprises an electrically conductive substrate including a primary surface comprised of a first gallium nitride based semiconductor, and a Group III nitride semiconductor region including a first p-type gallium nitride based semiconductor layer and provided on the primary surface. The primary surface of the substrate is inclined at an angle in the range of not less than 50 degrees, and less than 130 degrees from a plane perpendicular to a reference axis extending along the c-axis of the first gallium nitride based semiconductor, an oxygen concentration Noxg of the first p-type gallium nitride based semiconductor layer is not more than 5×1017 cm?3, and a ratio (Noxg/Npd) of the oxygen concentration Noxg to a p-type dopant concentration Npd of the first p-type gallium nitride based semiconductor layer is not more than 1/10.