Patents by Inventor Koji Nisisu

Koji Nisisu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7911769
    Abstract: This invention prevents a deterioration of efficiency of a power supply apparatus due to a semiconductor power supply voltage drop, prevents an increase in wasted power, and prevents erroneous operations due to feeder wire voltage drop. In the mounting structure of electronic circuits having a plurality of busbars as current paths on a printed circuit board, the plurality of busbars have almost parallel portions spaced a predetermined distance apart; a span of the parallel portions of the plurality of busbars is greater than the predetermined distance; and in the parallel portions of the plurality of busbars, the plurality of busbars are connected by a wiring pattern. In the switching power supply apparatus built on a printed circuit board, with its output voltage of less than 2 V and its output current of more than 100 A, a means is provided for making the power efficiency higher than 70%.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: March 22, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hideho Yamamura, Naoki Maru, Kazunori Nakajima, Koji Nisisu, Shigeo Oomae
  • Publication number: 20090257210
    Abstract: This invention prevents a deterioration of efficiency of a power supply apparatus due to a semiconductor power supply voltage drop, prevents an increase in wasted power, and prevents erroneous operations due to feeder wire voltage drop. In the mounting structure of electronic circuits having a plurality of busbars as current paths on a printed circuit board, the plurality of busbars have almost parallel portions spaced a predetermined distance apart; a span of the parallel portions of the plurality of busbars is greater than the predetermined distance; and in the parallel portions of the plurality of busbars, the plurality of busbars are connected by a wiring pattern. In the switching power supply apparatus built on a printed circuit board, with its output voltage of less than 2 V and its output current of more than 100 A, a means is provided for making the power efficiency higher than 70%.
    Type: Application
    Filed: June 18, 2009
    Publication date: October 15, 2009
    Inventors: Hideho Yamamura, Naoki Maru, Kazunori Nakajima, Koji Nisisu, Shigeo Oomae
  • Patent number: 7548411
    Abstract: This invention prevents a deterioration of efficiency of a power supply apparatus due to a semiconductor power supply voltage drop, prevents an increase in wasted power, and prevents erroneous operations due to feeder wire voltage drop. In the mounting structure of electronic circuits having a plurality of busbars as current paths on a printed circuit board, the plurality of busbars have almost parallel portions spaced a predetermined distance apart; a span of the parallel portions of the plurality of busbars is greater than the predetermined distance; and in the parallel portions of the plurality of busbars, the plurality of busbars are connected by a wiring pattern. In the switching power supply apparatus built on a printed circuit board, with its output voltage of less than 2 V and its output current of more than 100 A, a means is provided for making the power efficiency higher than 70%.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: June 16, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Hideho Yamamura, Naoki Maru, Kazunori Nakajima, Koji Nisisu, Shigeo Oomae
  • Patent number: 7208883
    Abstract: In the current detection circuit that detects the output currents of a switching power supply circuit, an improved current detection circuit makes it possible to detect the output current directions of power supplies solves the malfunction of the power supplies vibrating or diverging during changes in load state and during parallel operation, and thus implements stable operation. The direction of an output current I2 can be detected by using the current detection circuit 8 that has multiple switching elements S1 to S4 each operating synchronously with an inverter circuit.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: April 24, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Maru, Hideho Yamamura, Koji Nisisu, Shigeo Oomae
  • Publication number: 20060132062
    Abstract: In the current detection circuit that detects the output currents of a switching power supply circuit, an improved current detection circuit makes it possible to detect the output current directions of power supplies solves the malfunction of the power supplies vibrating or diverging during changes in load state and during parallel operation, and thus implements stable operation. The direction of an output current I2 can be detected by using the current detection circuit 8 that has multiple switching elements S1 to S4 each operating synchronously with an inverter circuit.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 22, 2006
    Inventors: Naoki Maru, Hideho Yamamura, Koji Nisisu, Shigeo Oomae
  • Publication number: 20060092599
    Abstract: This invention prevents a deterioration of efficiency of a power supply apparatus due to a semiconductor power supply voltage drop, prevents an increase in wasted power, and prevents erroneous operations due to feeder wire voltage drop. In the mounting structure of electronic circuits having a plurality of busbars as current paths on a printed circuit board, the plurality of busbars have almost parallel portions spaced a predetermined distance apart; a span of the parallel portions of the plurality of busbars is greater than the predetermined distance; and in the parallel portions of the plurality of busbars, the plurality of busbars are connected by a wiring pattern. In the switching power supply apparatus built on a printed circuit board, with its output voltage of less than 2 V and its output current of more than 100 A, a means is provided for making the power efficiency higher than 70%.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 4, 2006
    Inventors: Hideho Yamamura, Naoki Maru, Kazunori Nakajima, Koji Nisisu, Shigeo Oomae