Patents by Inventor Koji Sueoka

Koji Sueoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11162191
    Abstract: A processing temperature TS by a rapid thermal processing furnace is 1250° C. or more and 1350° C. or less, and a cooling rate Rd from the processing temperature is in a range of 20° C./s or more and 150° C./s or less, and thermal processing is performed by adjusting the processing temperature TS and the cooling rate Rd within a range between the upper limit P=0.00207TS·Rd?2.52Rd+13.3 (Formula (A)) and the lower limit P=0.000548TS·Rd?0.605Rd?0.511 (Formula (B)) of an oxygen partial pressure P in a thermal processing atmosphere.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: November 2, 2021
    Assignee: GLOBALWAFERS JAPAN CO., LTD.
    Inventors: Susumu Maeda, Hironori Banba, Haruo Sudo, Hideyuki Okamura, Koji Araki, Koji Sueoka, Kozo Nakamura
  • Publication number: 20200181802
    Abstract: A processing temperature TS by a rapid thermal processing furnace is 1250° C. or more and 1350° C. or less, and a cooling rate Rd from the processing temperature is in a range of 20° C./s or more and 150° C./s or less, and thermal processing is performed by adjusting the processing temperature TS and the cooling rate Rd within a range between the upper limit P=0.00207TS·Rd?2.52Rd+13.3 (Formula (A)) and the lower limit P=0.000548TS·Rd?0.605Rd?0.511 (Formula (B)) of an oxygen partial pressure P in a thermal processing atmosphere.
    Type: Application
    Filed: March 23, 2017
    Publication date: June 11, 2020
    Inventors: Susumu MAEDA, Hironori BANBA, Haruo SUDO, Hideyuki OKAMURA, Koji ARAKI, Koji SUEOKA, Kozo NAKAMURA
  • Patent number: 10648101
    Abstract: A silicon wafer includes a denuded zone which is a surface layer and of which the density of vacancy-oxygen complexes which are complexes of vacancies and oxygen is less than 1.0×1012/cm3. An intermediate layer is disposed inwardly of the denuded zone so as to be adjacent to the denuded zone. The density of the vacancy-oxygen complexes in the intermediate layer increases gradually inwardly in the depth direction from the boundary with the denuded zone within a range of 1.0×1012/cm3 or over and less than 5.0×1012/cm3. The intermediate layer has a depth determined corresponding to the depth of the denuded zone. A bulk layer is disposed inwardly of the intermediate layer so as to be adjacent to the intermediate layer. The density of the vacancy-oxygen complexes in the bulk layer is 5.0×1012/cm3 or over.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: May 12, 2020
    Assignee: GLOBALWAFERS JAPAN CO., LTD.
    Inventors: Susumu Maeda, Hironori Banba, Haruo Sudo, Hideyuki Okamura, Koji Araki, Koji Sueoka, Kozo Nakamura
  • Publication number: 20190119828
    Abstract: A silicon wafer includes a denuded zone which is a surface layer and of which the density of vacancy-oxygen complexes which are complexes of vacancies and oxygen is less than 1.0×1012/cm3. An intermediate layer is disposed inwardly of the denuded zone so as to be adjacent to the denuded zone. The density of the vacancy-oxygen complexes in the intermediate layer increases gradually inwardly in the depth direction from the boundary with the denuded zone within a range of 1.0×1012/cm3 or over and less than 5.0×1012/cm3. The intermediate layer has a depth determined corresponding to the depth of the denuded zone. A bulk layer is disposed inwardly of the intermediate layer so as to be adjacent to the intermediate layer. The density of the vacancy-oxygen complexes in the bulk layer is 5.0×1012/cm3 or over.
    Type: Application
    Filed: February 24, 2017
    Publication date: April 25, 2019
    Inventors: Susumu MAEDA, Hironori BANBA, Haruo SUDO, Hideyuki OKAMURA, Koji ARAKI, Koji SUEOKA, Kozo NAKAMURA
  • Patent number: 7397110
    Abstract: A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 ?cm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: July 8, 2008
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Nobumitsu Takase, Hideshi Nishikawa, Makoto Ito, Koji Sueoka, Shinsuke Sadamitsu
  • Patent number: 7316745
    Abstract: A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 ?cm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: January 8, 2008
    Assignee: Sumco Corporation
    Inventors: Shinsuke Sadamitsu, Nobumitsu Takase, Hiroyuki Takao, Koji Sueoka, Masataka Horai
  • Publication number: 20050253221
    Abstract: A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 ?cm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less.
    Type: Application
    Filed: April 16, 2003
    Publication date: November 17, 2005
    Applicant: SUMITOMO MITSUBISHI SILICON CORPORATION
    Inventors: Nobumitsu Takase, Hideshi Nishikawa, Makoto Ito, Koji Sueoka, Shinsuke Sadamitsu
  • Publication number: 20050250349
    Abstract: A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 ?cm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.
    Type: Application
    Filed: June 30, 2003
    Publication date: November 10, 2005
    Applicant: SUMITOMO MITSUBISHI SILICON CORPORATION
    Inventors: Shinsuke Sadamitsu, Nobumitsu Takase, Hiroyuki Takao, Koji Sueoka, Masataka Horai
  • Patent number: 6803242
    Abstract: In a conventional evaluation method of IG effectivity on Cu in semiconductor silicon substrates, it is required to actually conduct the device process, or a great deal of time, manpower and expenses for manufacturing a MOS device for dielectric breakdown estimation and the like are needed, but in the present invention, the problem was solved by experimentally finding in advance the optimum ranges of the diagonal length and density of oxygen precipitates which make the IG effectivity on Cu favorable, and conducting a heat treatment for the addition of IG effectivity based on a simulation by calculations using Fokker-Planck equations so that the diagonal length and density of plate-like precipitates fall within the optimum ranges.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: October 12, 2004
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Takayuki Kihara, Shinsuke Sadamitsu, Koji Sueoka
  • Publication number: 20030203519
    Abstract: In a conventional evaluation method of IG effectivity on Cu in semiconductor silicon substrates, it is required to actually conduct the device process, or a great deal of time, manpower and expenses for manufacturing a MOS device for dielectric breakdown estimation and the like are needed, but in the present invention, the problem was solved by experimentally finding in advance the optimum ranges of the diagonal length and density of oxygen precipitates which make the IG effectivity on Cu favorable, and conducting a heat treatment for the addition of IG effectivity based on a simulation by calculations using Fokker-Planck equations so that the diagonal length and density of plate-like precipitates fall within the optimum ranges.
    Type: Application
    Filed: April 25, 2003
    Publication date: October 30, 2003
    Inventors: Takayuki Kihara, Shinsuke Sadamitsu, Koji Sueoka
  • Patent number: 5691049
    Abstract: A heat shrinkable polyolefin laminate film having surface layers made of a crystalline polypropylene resin, and an intermediate layer made of an ethylene resin composition consisting essentially of a linear low density polyethylene and a syndiotactic polypropylene, which is stretched at least two times in the machine and transverse directions, respectively, and which does not cause lowering of the transparency even if recovered films are incorporated into the intermediate layer, is excellent in low temperature shrinkability and packaging machine applicability, and is suitably used as a heat shrinkable packaging material.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: November 25, 1997
    Assignee: Kohjin Co., Ltd.
    Inventors: Shuichi Morita, Koji Sueoka, Fumio Horita, Toshikatsu Oyama, Hideo Isozaki
  • Patent number: 5620803
    Abstract: The heat shrinkable polypropylene film having an isotactic polypropylene layer as surface layers and a layer mainly composed of a syndiotactic polypropylene as an intermediate layer, having a shrinkage of not less than 25% at 100.degree. C. in the machine and transverse directions and being stretched at least two times in the machine and transverse directions, respectively. The film has a good packaging machine applicability and excellent propagation tear resistance, low temperature shrinkability and heat resistance, and is suitably used as a shrink packaging material.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: April 15, 1997
    Assignee: Kohjin Co., Ltd.
    Inventors: Toshikatsu Oyama, Shuichi Morita, Fumio Horita, Koji Sueoka, Hideo Isozaki