Patents by Inventor Koji Wakizono

Koji Wakizono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8575658
    Abstract: A semiconductor device includes a compound semiconductor substrate; a first conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; a first conductivity type first barrier layer that forms a heterojunction with the first channel layer, and supplies a first conductivity type charge to the first channel layer; and a second conductivity type gate region that has a pn junction-type potential barrier against the first conductivity type first barrier layer; and a second conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a second conductivity type second channel layer, and a first conductivity type gate region that has a pn junction-type potential barrier against the second conductivity type second channel layer.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: November 5, 2013
    Assignee: Sony Corporation
    Inventors: Shinichi Tamari, Mitsuhiro Nakamura, Koji Wakizono, Tomoya Nishida, Yuji Ibusuki
  • Patent number: 8378389
    Abstract: A semiconductor device includes: a compound semiconductor substrate; an n-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; an n-type first barrier layer that forms a heterojunction with the first channel layer, and supplies an n-type charge to the first channel layer; and a p-type gate region that has a pn junction-type potential barrier against the n-type first barrier layer; and a p-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a p-type second channel layer, and an n-type gate region that has a pn junction-type potential barrier against the p-type second channel layer.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: February 19, 2013
    Assignee: Sony Corporation
    Inventors: Shinichi Tamari, Mitsuhiro Nakamura, Koji Wakizono, Tomoya Nishida, Yuji Ibusuki
  • Publication number: 20120267684
    Abstract: A semiconductor device includes a compound semiconductor substrate; a first conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; a first conductivity type first barrier layer that forms a heterojunction with the first channel layer, and supplies a first conductivity type charge to the first channel layer; and a second conductivity type gate region that has a pn junction-type potential barrier against the first conductivity type first barrier layer; and a second conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a second conductivity type second channel layer, and a first conductivity type gate region that has a pn junction-type potential barrier against the second conductivity type second channel layer.
    Type: Application
    Filed: June 29, 2012
    Publication date: October 25, 2012
    Applicant: Sony Corporation
    Inventors: SHINICHI TAMARI, MITSUHIRO NAKAMURA, KOJI WAKIZONO, TOMOYA NISHIDA, YUJI IBUSUKI
  • Publication number: 20110024798
    Abstract: A semiconductor device includes: a compound semiconductor substrate; an n-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; an n-type first barrier layer that forms a heterojunction with the first channel layer, and supplies an n-type charge to the first channel layer; and a p-type gate region that has a pn junction-type potential barrier against the n-type first barrier layer; and a p-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a p-type second channel layer, and an n-type gate region that has a pn junction-type potential barrier against the p-type second channel layer.
    Type: Application
    Filed: July 15, 2010
    Publication date: February 3, 2011
    Applicant: Sony Corporation
    Inventors: Shinichi Tamari, Mitsuhiro Nakamura, Koji Wakizono, Tomoya Nishida, Yuji Ibusuki