Patents by Inventor Kong Boon YEAP

Kong Boon YEAP has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10523206
    Abstract: One illustrative method disclosed herein includes forming a first transistor for an inverter and forming asymmetrically spaced first and second conductive contact structures that are conductively coupled to the source region and the drain region, respectively, of the transistor. In this example, the first conductive contact structure (for the source region) is positioned a first predetermined target distance from a first side of the gate structure of the transistor, and the second conductive contact structure (for the drain region) is positioned a second predetermined target distance from a second side of the gate structure, wherein the second predetermined target distance is less than the first predetermined target distance.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 31, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Kong Boon Yeap, Yang Liu, Tian Shen, Anjum Mehta
  • Patent number: 10475677
    Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: November 12, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Tian Shen, Anil Kumar, Yuncheng Song, Kong Boon Yeap, Ronald G. Filippi, Jr., Linjun Cao, Seungman Choi, Cathryn J. Christiansen, Patrick R. Justison
  • Publication number: 20190288690
    Abstract: One illustrative method disclosed herein includes forming a first transistor for an inverter and forming asymmetrically spaced first and second conductive contact structures that are conductively coupled to the source region and the drain region, respectively, of the transistor. In this example, the first conductive contact structure (for the source region) is positioned a first predetermined target distance from a first side of the gate structure of the transistor, and the second conductive contact structure (for the drain region) is positioned a second predetermined target distance from a second side of the gate structure, wherein the second predetermined target distance is less than the first predetermined target distance.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: Kong Boon Yeap, Yang Liu, Tian Shen, Anjum Mehta
  • Publication number: 20190067056
    Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.
    Type: Application
    Filed: August 22, 2017
    Publication date: February 28, 2019
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Tian Shen, Anil Kumar, Yuncheng Song, Kong Boon Yeap, Ronald G. Filippi, JR., Linjun Cao, Seungman Choi, Cathryn J. Christiansen, Patrick R. Justison
  • Publication number: 20190066812
    Abstract: An e-fuse structure including a circuit having an e-fuse operably coupling the circuit to a power source, and a redundant circuit for operably coupling the power source in response to opening of the e-fuse, wherein the e-fuse opens in response to a time-dependent dielectric breakdown (TDDB) percolation current in proximity to the circuit migrating through the e-fuse. A method of programming such an e-fuse structure is also disclosed.
    Type: Application
    Filed: August 24, 2017
    Publication date: February 28, 2019
    Inventors: Kong Boon Yeap, Tian Shen, Ronald Gene Filippi, JR., Seungman Choi, Linjun Cao
  • Patent number: 10151645
    Abstract: The invention relates to an arrangement and to a method for the synchronous determination of the shear modulus and of the Poisson's number on samples of elastically isotropic and anisotropic materials. In the arrangement, an indenter is movable in parallel with its longitudinal axis (A) in the direction of the surface of a sample such that a force action is exerted on the material by its tip. The force can be determined by a device for measuring this force and the indenter is additionally deflected in translation along at least one further axis. The longitudinal axis (A) of the indenter is aligned at an angle ?90° with respect to the surface of the sample and the indenter carries out an upward movement and a downward movement.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: December 11, 2018
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Kong Boon Yeap, Malgorzata Kopycinska-Mueller, Ehrenfried Zschech, Martin Gall
  • Patent number: 10147783
    Abstract: Structures for an on-chip capacitor and methods of forming an on-chip capacitor. A metal terminal is formed that has a side edge. Metal fingers are formed that have a parallel arrangement. Floating islands comprised of a metal are formed and are electrically isolated from the metal fingers. Each of the metal fingers has an end and extends from the side edge of the metal terminal toward the end. Each of the floating islands is arranged in a spaced relationship with the end of a respective one of the metal fingers.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: December 4, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Atsushi Ogino, Vikrant Chauhan, Kong Boon Yeap, Ahmed Hassan
  • Publication number: 20180269275
    Abstract: Structures for an on-chip capacitor and methods of forming an on-chip capacitor. A metal terminal is formed that has a side edge. Metal fingers are formed that have a parallel arrangement. Floating islands comprised of a metal are formed and are electrically isolated from the metal fingers. Each of the metal fingers has an end and extends from the side edge of the metal terminal toward the end. Each of the floating islands is arranged in a spaced relationship with the end of a respective one of the metal fingers.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 20, 2018
    Inventors: Atsushi Ogino, Vikrant Chauhan, Kong Boon Yeap, Ahmed Hassan
  • Publication number: 20150066394
    Abstract: The invention relates to an arrangement and to a method for the synchronous determination of the shear modulus and of the Poisson's number on samples of elastically isotropic and anisotropic materials. In the arrangement, an indenter is movable in parallel with its longitudinal axis (A) in the direction of the surface of a sample such that a force action is exerted on the material by its tip. The force can be determined by a device for measuring this force and the indenter is additionally deflected in translation along at least one further axis. The longitudinal axis (A) of the indenter is aligned at an angle ?90° with respect to the surface of the sample and the indenter carries out an upward movement and a downward movement.
    Type: Application
    Filed: September 2, 2014
    Publication date: March 5, 2015
    Inventors: Kong Boon YEAP, Malgorzata KOPYCINSKA-MUELLER, Ehrenfried ZSCHECH, Martin GALL