Patents by Inventor Konstantine Iourcha

Konstantine Iourcha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110050710
    Abstract: Disclosed herein is a graphics-processing unit (GPU) having an internal memory for general-purpose use and applications thereof. Such a GPU includes a first internal memory, an execution unit coupled to the first internal memory, and an interface configured to couple the first internal memory to a second internal memory of an other processing unit. The first internal memory may comprise a stacked dynamic random access memory (DRAM) or an embedded DRAM. The interface may be further configured to couple the first internal memory to a display device. The GPU may also include another interface configured to couple the first internal memory to a central processing unit. In addition, the GPU may be embodied in software and/or included in a computing system.
    Type: Application
    Filed: November 11, 2009
    Publication date: March 3, 2011
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Greg SADOWSKI, Konstantine Iourcha, John Brothers
  • Publication number: 20100245374
    Abstract: A method and apparatus for angular invariant texture level of detail calculation is disclosed. The method includes a determination for a LOD that determines angular invariant LODs that result in efficient ASIC hardware implementation.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 30, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Konstantine Iourcha, Michael Doggett
  • Patent number: 7675521
    Abstract: Systems for performing rasterization are described. At least one embodiment includes a span generator for performing rasterization. In accordance with such embodiments, the span generator comprises functionals representing a scissoring box, loaders configured to convert the functionals from a general form to a special case form, edge generators configured to read the special case form of the scissoring box, whereby the special case form simplifies calculations by the edge generators. The span generator further comprises sorters configured to compute the intersection of half-planes, wherein edges of the intersection are generated by the edge generators and a span buffer configured to temporarily store spans before tiling.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: March 9, 2010
    Assignee: VIA Technologies, Inc.
    Inventors: Konstantine Iourcha, Boris Prokopenko, Timour Paltashev, Derek Gladding
  • Patent number: 7643679
    Abstract: Embodiments of the present invention are directed to a method and apparatus for block based image compression with multiple non-uniform block encodings. In one embodiment, an image is divided into blocks of pixels. In one embodiment the blocks are four pixels by four pixels, but other block sizes are used in other embodiments. In one embodiment, a block of pixels in the original image is compressed using two different methods to produce a first and second compressed block. Thus, each block in the original image is represented by two, typically different, compressed blocks. In one embodiment, color associated with a pixel is determined by combining the compressed information about the pixel in the first compressed block with information about the pixel in the second compressed block. In another embodiment, global information about the image is combined with the information in the first and second compressed blocks.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: January 5, 2010
    Assignee: ATI Technologies ULC
    Inventors: Konstantine Iourcha, Andrew S. C. Pomianowski, Raja Koduri
  • Publication number: 20090274366
    Abstract: Embodiments of the present invention are directed to a method and apparatus for block based image compression with multiple non-uniform block encodings. In one embodiment, an image is divided into blocks of pixels. In one embodiment the blocks are four pixels by four pixels, but other block sizes are used in other embodiments. In one embodiment, a block of pixels in the original image is compressed using two different methods to produce a first and second compressed block. Thus, each block in the original image is represented by two, typically different, compressed blocks. In one embodiment, color associated with a pixel is determined by combining the compressed information about the pixel in the first compressed block with information about the pixel in the second compressed block. In another embodiment, global information about the image is combined with the information in the first and second compressed blocks.
    Type: Application
    Filed: June 16, 2009
    Publication date: November 5, 2009
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Konstantine Iourcha, Andrew S. C. Pomianowski, Raja Koduri
  • Publication number: 20090256848
    Abstract: Embodiments of a filtering method and apparatus for anti-aliasing as described herein take advantage of improved existing hardware by using as input the data stored in the multisampling anti-aliasing (MSAA) buffers after rendering. The standard hardware box-filter is then replaced with a more intelligent resolve implemented using shader programs. Embodiments find scene edges using existing samples generated by Graphics Processing Unit (GPU) hardware. Using samples from a footprint larger than a single pixel, a gradient is calculated matching the direction of an edge. A non-linear filter over contributing samples in the direction of the gradient gives the final result.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 15, 2009
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Konstantine Iourcha, Jason Yang, Andrew Pomianowski
  • Patent number: 7551174
    Abstract: A low-cost high-speed programmable rasterizer accepting an input set of functionals representing a triangle, clipping planes and a scissoring box, and producing multiple spans per clock cycle as output. A Loader converts the input set from a general form to a special case form accepted by a set of Edge Generators, the restricted input format accepted by the Edge Generators contributing to their efficient hardware implementation.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: June 23, 2009
    Assignee: Via Technologies, Inc.
    Inventors: Konstantine Iourcha, Boris Prokopenko, Timour Paltashev, Derek Gladding
  • Publication number: 20080158252
    Abstract: Systems for performing rasterization are described. At least one embodiment includes a span generator for performing rasterization. In accordance with such embodiments, the span generator comprises functionals representing a scissoring box, loaders configured to convert the functionals from a general form to a special case form, edge generators configured to read the special case form of the scissoring box, whereby the special case form simplifies calculations by the edge generators. The span generator further comprises sorters configured to compute the intersection of half-planes, wherein edges of the intersection are generated by the edge generators and a span buffer configured to temporarily store spans before tiling.
    Type: Application
    Filed: March 11, 2008
    Publication date: July 3, 2008
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Konstantine Iourcha, Boris Prokopenko, Timour Paltashev, Derek Gladding
  • Publication number: 20080055331
    Abstract: A texture compression method is described. The method comprises splitting an original texture having a plurality of pixels into original blocks of pixels. Then, for each of the original blocks of pixels, a partition is identified that has one or more disjoint subsets of pixels whose union is the original block of pixels. The original block of pixels is further subdivided into one or more subsets according to the identified partition. Finally, each subset is independently compressed to form a compressed texture block.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 6, 2008
    Applicant: ATI Technologies Inc.
    Inventors: Konstantine Iourcha, Andrew S.C. Pomianowski
  • Patent number: 7158133
    Abstract: A system and method for providing shadow information for 3D computer graphics objects on a display for a graphic computer system are disclosed. The 3D objects are processed only once and the rendering and shadow generation information is stored in memory. In a subsequent two-dimensional pass, the shadow information is used to provide the color value at each rendered pixel. Thus, the latency and the need for storage capacity due to the multiple 3D pass processing are eliminated.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: January 2, 2007
    Assignee: S3 Graphics Co., Ltd.
    Inventors: Zhou Hong, Konstantine Iourcha
  • Publication number: 20060210178
    Abstract: An image processing system including an image encoder and image decoding system is provided. The image encoder system includes an image decomposer, a block encoder, and an encoded image composer. The image decomposer decomposes the image into blocks. The block encoder, which includes a selection module, a codeword generation module and a construction module, processes the blocks. Specifically, the selection module computes a set of parameters from image data values of a set of image elements in the image block. The codeword generation module generates codewords, which the construction module uses to derive a set of quantized image data values. The construction module then maps each of the image element's original image data values to an index to one of the derived image data values. The image decoding system reverses this process to reorder decompressed image blocks in an output data file.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 21, 2006
    Inventors: Zhou Hong, Konstantine Iourcha, Krishna Nayak
  • Publication number: 20060139357
    Abstract: Embodiments described herein provide a programmable mapping scheme for mapping information to resources of a system. In an embodiment, a programmable lattice method operates to map information to resources of a system. For example, the programmable lattice method can be used to map pixel data to graphics processing resources of a graphics processing system. In another embodiment, a programmable hybrid method operates to map information to resources of a system. For example, the programmable hybrid method can be used to map pixel data to graphics processing resources of a graphics processing system. The mapping methods described are applicable to any multi-dimensional array processing (e.g., 2D and 3D). The methods provide a uniform distribution of resources and tend to reduce resource collisions when allocating information to a resource.
    Type: Application
    Filed: November 14, 2005
    Publication date: June 29, 2006
    Inventors: Konstantine Iourcha, Gordon Elder, Elaine Poon
  • Publication number: 20050179698
    Abstract: A system and method is provided for preventing the occurrence of aliasing at the edges of polygons in 3D graphics. The system may detect both polygon geometric edges and Z edges due to intersection of multiple polygons. In one embodiment, the system includes an edge anti-aliasing module configured to selectively super-sample edge portions of primitives. The system further includes a coarse memory for storing information of pixels that are not super-sampled and a fine memory for storing information of pixels that are super-sampled by the edge anti-aliasing module.
    Type: Application
    Filed: October 18, 2004
    Publication date: August 18, 2005
    Inventors: Baskaran Vijayakumar, Konstantine Iourcha
  • Publication number: 20050134603
    Abstract: A low-cost high-speed programmable rasterizer accepting an input set of functionals representing a triangle, clipping planes and a scissoring box, and producing multiple spans per clock cycle as output. A Loader converts the input set from a general form to a special case form accepted by a set of Edge Generators, the restricted input format accepted by the Edge Generators contributing to their efficient hardware implementation.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Applicant: Via Technologies, Inc
    Inventors: Konstantine Iourcha, Boris Prokopenko, Timour Paltashev, Derek Gladding
  • Publication number: 20050017974
    Abstract: A system and method for providing shadow information for 3D computer graphics objects on a display for a graphic computer system are disclosed. The 3D objects are processed only once and the rendering and shadow generation information is stored in memory. In a subsequent two-dimensional pass, the shadow information is used to provide the color value at each rendered pixel. Thus, the latency and the need for storage capacity due to the multiple 3D pass processing are eliminated.
    Type: Application
    Filed: August 24, 2004
    Publication date: January 27, 2005
    Inventors: Zhou Hong, Konstantine Iourcha
  • Publication number: 20050007379
    Abstract: A method and apparatus for texture filtering is provide wherein a filter select module is adapted to select a filtering mode based upon a sampling rate of polygon and texture data. The filter mode is selected by determining the filter characteristics of the selected filtering mode based upon the sampling rate and a degree of warping per texture coordinate. A texture reconstruction filter characteristic is morphed based upon the input polygon and texture data so that, after subsamples are aggregated, an effective filter characteristic matches the texture reconstruction filter characteristic of a texture reconstruction filter used for coarse sampling. Subsequently, a texel blending module computes texel blending factors based on the filtering mode determined by the filter select module.
    Type: Application
    Filed: May 26, 2004
    Publication date: January 13, 2005
    Inventors: Baskaran Vijayakumar, Konstantine Iourcha
  • Publication number: 20040228527
    Abstract: Embodiments of the present invention are directed to a method and apparatus for block based image compression with multiple non-uniform block encodings. In one embodiment, an image is divided into blocks of pixels. In one embodiment the blocks are four pixels by four pixels, but other block sizes are used in other embodiments. In one embodiment, a block of pixels in the original image is compressed using two different methods to produce a first and second compressed block. Thus, each block in the original image is represented by two, typically different, compressed blocks. In one embodiment, color associated with a pixel is determined by combining the compressed information about the pixel in the first compressed block with information about the pixel in the second compressed block. In another embodiment, global information about the image is combined with the information in the first and second compressed blocks.
    Type: Application
    Filed: February 13, 2004
    Publication date: November 18, 2004
    Inventors: Konstantine Iourcha, Andrew S.C. Pomianowski, Raja Koduri
  • Patent number: 6791544
    Abstract: A system and method for providing shadow information for 3D computer graphics objects on a display for a graphic computer system are disclosed. The 3D objects are processed only once and the rendering and shadow generation information is stored in memory. In a subsequent two-dimensional pass, the shadow information is used to provide the color value at each rendered pixel. Thus, the latency and the need for storage capacity due to the multiple 3D pass processing are eliminated.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: September 14, 2004
    Assignee: S3 Graphics Co., Ltd.
    Inventors: Zhou Hong, Konstantine Iourcha
  • Patent number: 6590579
    Abstract: A system and method is provided for mipmap texturing in which texture tiles are mapped into sets of a set-associative texture cache for use in displaying a graphic primitive. When a miss occurs, a new texture tile is called from main memory to replace a texture tile which is not shared between the segment being traversed and the next segment to be traversed and which is the “least recently used”. This is accomplished by maintaining a record for each cache line describing the texture tile it contains and replacing the texture tile which is the “least likely to be reused”.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: July 8, 2003
    Assignee: S3 Graphics Co., Ltd.
    Inventors: Zhou Hong, Konstantine Iourcha, Lin Chen
  • Patent number: 6373496
    Abstract: An apparatus method is provided for mipmapping a texel to a pixel to computer graphics objects on a display for a graphics computer system. The rendering speed is increased by determining the texture coordinates and the mipmap level of detail of the mipmap in parallel. The texture coordinate and mipmap level of detail constants are calculated in parallel for an object primitive and pixels are selected in the primitive. The pixels are rendered based on parallel texture coordinate and mipmap level of detail calculations using the previously calculated texture coordinate and mipmap level of detail constants.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: April 16, 2002
    Assignee: S3 Graphics Co., Ltd.
    Inventor: Konstantine Iourcha