Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a UMTS format and at least one non-UMTS format.

Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a UMTS format and at least one non-UMTS format.

Abstract: An RF transmitter includes a Cartesian to polar conversion section, a PLL, a DAC module, a mixing module, and a PA module. The Cartesian to polar conversion section converts a Cartesian based symbol stream into a polar based symbol stream. The PLL generates an oscillation when the RF transmitter is in a Cartesian mode or a phase modulated oscillation based on phase modulation information of the polar based symbol stream when the RF transmitter is in a polar mode. The mixing module mixes an analog Cartesian based signal with a local oscillation to produce a Cartesian based up converted signal when the RF transmitter is in the Cartesian mode and mixes an analog amplitude signal with a phase modulated local oscillation to produce a polar based up converted signal when the RF transmitter is in the polar mode.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a GSM format and at least one non-GSM format.

Abstract: A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a GSM format and at least one non-GSM format.

Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a code divisional multiple access format and at least one non-code division multiple access format.

Abstract: Aspects of a method and system for a multi-band direct conversion complementary metal-oxide-semiconductor (CMOS) mobile television tuner are provided. A single-chip multi-band radio frequency (RF) receiver in a mobile terminal comprising UHF and L-band front-ends receives and amplifies an RF signal utilizing a low noise amplifier (LNA) an LNA integrated into the front-end that corresponds to the type of signal received. A received signal strength indicator (RSSI) value may be determined for the amplified signal within the receiver and may be utilized to adjust a gain of the LNA. The adjustment may be made via on-chip or off-chip processing of the RSSI value. The receiver may directly convert the amplified signal to a baseband frequency signal and generate in-phase and quadrature components. The components of the baseband frequency signal may be filtered and/or amplified via programmable devices within the receiver. Circuitry within the receiver may be controller via an on-chip digital interface.

Abstract: A low-noise amplifier in a receiver has a differential mode of operation and at least one single-ended mode of operation. A control signal is used to select between or among the modes and the switching between differential and single-ended operations may be performed on the fly.

Abstract: A local oscillator (LO) signal generator that has a reference phase-locked loop (PLL), a receiver LO PLL and a transmitter LO PLL. A reference PLL is coupled to receive a reference clock input and to generate a reference PLL signal at its output, which then drives a receiver PLL and a transmitter PLL. The receiver PLL is coupled to receive the reference PLL signal and to use the reference PLL signal as its reference input to generate a receiver LO signal at its output. The transmitter PLL is coupled to receive the reference PLL signal and to use the reference PLL signal as its reference input to generate a transmitter LO signal at its output.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: A method and system for filter calibration using fractional-N frequency synthesized signals are presented. Aspects of the method may include generating an LO signal by a PLL circuit within a chip. A reference signal may be generated based on the generated LO signal and a synthesizer control signal. A frequency response for a filter circuit integrated within the chip may be calibrated by adjusting parameters associated with the filter circuit based on the generated LO signal. Aspects of the system may include a single-chip multi-band RF receiver that enables generation of a LO signal by a PLL circuit within the single-chip, and enables calibration of a frequency response for a filter circuit integrated within the chip. A reference signal may be generated based on the generated LO signal and a synthesizer control signal. The frequency response may be calibrated by adjusting the filter based on the generated reference signal.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a +90° or +re/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +re (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.