Patents by Inventor Kooi Choon OOI

Kooi Choon OOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8847370
    Abstract: In one aspect of the present invention, an integrated circuit package with an exposed die and a protective housing will be described. The housing extends beyond the exposed back surface of the die to help protect it from damage. The integrated circuit package includes a lead frame and an integrated circuit die. The integrated circuit die is electrically and physically attached to the lead frame. The housing encapsulates the lead frame and the die. The housing also includes a recessed region at the bottom of the package where the back surface of the die is exposed. There is a protruding protective structure at the bottom of the package that helps to protect the die and prevent its exposed back surface from coming in contact with an external object.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: September 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Lee Han Meng Eugene Lee, Kok Leong Yeo, Kooi Choon Ooi, Chen Seong Chua
  • Patent number: 8647966
    Abstract: In one aspect of the present invention, a method of sawing a semiconductor wafer will be described. A semiconductor wafer is positioned in a wafer sawing apparatus that includes a sawing blade and a movable support structure that physically supports the semiconductor wafer. The semiconductor wafer is coupled with the support structure with various layers, including a die attach film, an adhesive and a base film. The die attach film is cut with the sawing blade. During the cutting operation, a contact portion of the sawing blade engages one of the layers and moves at least partly in one direction. While the contact portion of the sawing blade engages the layer, the support structure moves in the opposite direction. Various aspects of the present invention relate to arrangements and a wafer sawing apparatus that involve the aforementioned sawing method.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: February 11, 2014
    Assignee: National Semiconductor Corporation
    Inventors: Ken Fei Lim, You Chye How, Kooi Choon Ooi
  • Publication number: 20130127029
    Abstract: A leadframe, device package, and mode of construction configured to attain a thin profile and improved thermal performance. Leadframes of this invention include a raised die attachment pad arrange above distal ends of leadframe leads. A package will further include a die electrically coupled with an underside surface of the raised die attachment pad, in one example, using ball bonds, the whole sealed in an encapsulant that exposed a bottom portion of the die and a portion of a lead. Two leadframe stacks of such packages are also disclosed as are methods of manufacture.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lee Han Meng @ Eugene LEE, Wei Fen Sueann LIM, Chen Seong CHUA, Kooi Choon OOI
  • Publication number: 20130087901
    Abstract: In one aspect of the present invention, an integrated circuit package with an exposed die and a protective housing will be described. The housing extends beyond the exposed back surface of the die to help protect it from damage. The integrated circuit package includes a lead frame and an integrated circuit die. The integrated circuit die is electrically and physically attached to the lead frame. The housing encapsulates the lead frame and the die. The housing also includes a recessed region at the bottom of the package where the back surface of the die is exposed. There is a protruding protective structure at the bottom of the package that helps to protect the die and prevent its exposed back surface from coming in contact with an external object.
    Type: Application
    Filed: October 10, 2011
    Publication date: April 11, 2013
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Lee Han Meng @ Eugene LEE, Kok Leong YEO, Kooi Choon OOI, Chen Seong CHUA
  • Publication number: 20120313231
    Abstract: In one aspect of the present invention, a method of sawing a semiconductor wafer will be described. A semiconductor wafer is positioned in a wafer sawing apparatus that includes a sawing blade and a movable support structure that physically supports the semiconductor wafer. The semiconductor wafer is coupled with the support structure with various layers, including a die attach film, an adhesive and a base film. The die attach film is cut with the sawing blade. During the cutting operation, a contact portion of the sawing blade engages one of the layers and moves at least partly in one direction. While the contact portion of the sawing blade engages the layer, the support structure moves in the opposite direction. Various aspects of the present invention relate to arrangements and a wafer sawing apparatus that involve the aforementioned sawing method.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 13, 2012
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Ken Fei LIM, You Chye HOW, Kooi Choon OOI