Patents by Inventor Koon Lun Jackie Wong

Koon Lun Jackie Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658670
    Abstract: The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion circuit can includes a digital input, an analog output, and a cell array. The digital to analog converter can also include an integrator, an analog to digital converter (ADC), and a summer coupled to the ADC, and an adaptation circuit coupled to the summer. The adaption circuit provides controls signals to the cell array.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: May 23, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Koon Lun Jackie Wong, Chi-Hung Lin
  • Publication number: 20220239303
    Abstract: The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion circuit can includes a digital input, an analog output, and a cell array. The digital to analog converter can also include an integrator, an analog to digital converter (ADC), and a summer coupled to the ADC, and an adaptation circuit coupled to the summer. The adaption circuit provides controls signals to the cell array.
    Type: Application
    Filed: January 28, 2021
    Publication date: July 28, 2022
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Koon Lun Jackie Wong, Chi-Hung Lin
  • Patent number: 7822114
    Abstract: A decision feedback equalizer (DFE) and method include at least two paths. Each path includes the following. An adder is configured to sum an input with a first feedback tap fed back from a different path. A latch is coupled to the adder to receive a summation signal as input. The latch includes a transparent state, and an output of the latch is employed as the first tap in a feedback path to an adder of a different path, wherein a partially resolved first tap in the feedback path is employed during the transparent state to provide a soft decision to supply correction information in advance of a hard decision of the latch.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Daniel J. Friedman, Alexander Rylyakov, Koon Lun Jackie Wong
  • Publication number: 20080310495
    Abstract: A decision feedback equalizer (DFE) and method include at least two paths. Each path includes the following. An adder is configured to sum an input with a first feedback tap fed back from a different path. A latch is coupled to the adder to receive a summation signal as input. The latch includes a transparent state, and an output of the latch is employed as the first tap in a feedback path to an adder of a different path, wherein a partially resolved first tap in the feedback path is employed during the transparent state to provide a soft decision to supply correction information in advance of a hard decision of the latch.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 18, 2008
    Inventors: John F. Bulzacchelli, Daniel J. Friedman, Alexander Rylyakov, Koon Lun Jackie Wong