Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for reducing artifacts in an image generated by a display device. In one aspect, data is written to a display and a position of display elements is maintained based on the application of a hold voltage pattern. The hold voltage pattern includes alternating polarities along one dimension in a pattern, and alternating polarities along a second dimension in a pattern. The polarities of the first and second patterns may be switched in a manner that maintains a substantially constant magnitude voltage across each display element.

Abstract: This disclosure provides implementations of dither-aware image coding processes, devices, apparatus, and systems. In one aspect, a portion of received image data is selected. First spatial domain values in the selected portion of the image data are transformed to first transform domain coefficients. Second spatial domain values in a designated dither matrix are transformed to second transform domain coefficients. A ratio of each of the first transform domain coefficients to a respective second transform domain coefficient is determined. The first transform domain coefficients are selectively coded in accordance with the determined ratios to define coded first transform domain coefficients. A reverse transformation is performed to transform the coded first transform domain coefficients to third spatial domain values defining a coded portion of the image data. By way of example, transformations such as discreet cosine transforms or discreet wavelet transforms can be used.

Abstract: This disclosure provides systems, methods and apparatuses, including computer programs encoded on computer-readable storage media, for calibrating a display. In one aspect, a method of calibrating a display includes determining one or more array voltages and, based on the determined array voltages, determining one or more drive scheme voltages. The determined drive scheme voltages may include, for example, a single segment voltage applied to all of the display elements of the array, and multiple common voltages applies to multiple subsets of the display elements of the array.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for tuning the white point of a display device. In one aspect, a display device includes a set of display elements configured to output light and electronics configured to drive the display elements. Each display element can have an on-state where a reflective surface can be positioned at a distance from a partially reflective surface such that the display element can reflect incident light. Each distance can be dependent on a bias voltage. At least one of the bias voltages for the display elements can be non-zero in the on-state, and one or more of the bias voltages may be adjustable to control a white point of the display device. The electronics can be electrically connected to the display elements to provide the at least one non-zero bias voltage.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for reducing common line write time in a display. In one aspect, a common line write waveform shape is based at least in part on the distance a given common line is from a segment driver circuit.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for calibrating display arrays. In one aspect, a method of calibrating a display array includes determining a particular drive response characteristic and updating a particular drive scheme voltage between updates of image data on the display array.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for a display with inactive dummy pixels. A display apparatus may include subpixels having a first electrode layer and a second electrode layer. The first electrode layer of an edge subpixel may include an opening, which may be made large enough to prevent the edge subpixel from actuating. The size of the openings also may be selected to attain a desired overall reflectivity for an array of edge subpixels. For example, the size of the openings may be selected to make the reflectivity of an edge pixel array similar to the reflectivity of a routing area.

Abstract: This disclosure provides systems, methods and apparatus including computer programs encoded on computer storage media, for driving a pixel of a display. In one aspect, a common driver may be configured to write data to different display elements in an array of display elements with different line times. By using different line times, a refresh rate of the display may be increased and the response of the display elements to the write waveform may be improved.

Abstract: This disclosure provides systems, methods and apparatus including computer programs encoded on computer storage media for producing line multiplied images with better visual appearance. The line multiplying is shifted for one of the colors of the display with respect to at least one other color of the display.

Abstract: The present disclosure provides methods, systems, and apparatus for directing incident light toward central regions of interferometric modulator displays. In one aspect, a display includes an array of microlenses embedded in a substrate adjacent a first surface of the substrate. An array of light modulators can be disposed over the first surface of the substrate. A light modulator can be disposed over a corresponding microlens. The microlenses can converge or concentrate incident light onto central regions of the corresponding light modulators. The microlenses may include single-element lenses, compound lenses, and/or graded-index lenses. Various methods of manufacturing such displays are also disclosed.

Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for calibrating display arrays. In one aspect, a method of calibrating a display array includes determining a particular drive response characteristic and updating a particular drive scheme voltage between updates of image data on the display array.

Abstract: An integrated dispersion compensator planar lightwave circuit (PLC). The PLC includes an input for receiving a fiber optic signal. The input couples the signal to a Fourier filter. The filter is configured to add a phase compensation to the signal to correct a chromatic dispersion of the signal. An output is coupled to transmit the dispersion compensated signal from the Fourier filter to other components on the PLC or to other external devices. The Fourier filter can be implemented using a tap delay filter. The tap delay filter can be implemented by using a plurality of delay lines for implementing the phase compensation for the signal. The delay lines can be implemented using Mach Zehnder couplers, wherein the Mach Zehnder couplers are configured to distribute power from signal between the delay lines and to recombine the power from the delay lines to generate the dispersion compensated signal. A plurality of thermal optic phase shifters can be coupled to the delay lines to generate the phase compensation.