Patents by Inventor Kotaro Kawahara
Kotaro Kawahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11888057Abstract: A technique for maintaining maximum unipolar current density while improving I2t tolerance is provided. In a semiconductor device, a first impurity layer and a Schottky interface are formed to sandwich a well layer therebetween. A first impurity layer is formed from an outermost layer of the well layer located closer to the Schottky interface than a source layer to below the source layer. The lower face of the first impurity layer is located below the Schottky interface.Type: GrantFiled: November 30, 2018Date of Patent: January 30, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Kotaro Kawahara, Shiro Hino
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Publication number: 20230282741Abstract: A silicon carbide semiconductor device includes: a dummy sense region; and a drift layer of a first conductivity type, wherein a MOSFET with a built-in SBD including a first well region of a second conductivity type connected to a source electrode is formed in an active region, a MOSFET with a built-in SBD including a second well region of a second conductivity type connected to a sense pad is formed in an active sense region, and a third well region of a second conductivity type which is not ohmic-connected to any of the source electrode and the sense pad is formed on an upper layer part of the n-type drift layer in the dummy sense region. A gate electrode of the MOSFET with the built-in SBD in the active region and the MOSFET with the built-in SBD in the active sense region is connected to a gate pad.Type: ApplicationFiled: September 24, 2020Publication date: September 7, 2023Applicant: Mitsubishi Electric CorporationInventors: Kotaro KAWAHARA, Shiro HINO
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Patent number: 11646369Abstract: In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.Type: GrantFiled: March 16, 2021Date of Patent: May 9, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yuichi Nagahisa, Shiro Hino, Koji Sadamatsu, Hideyuki Hatta, Kotaro Kawahara
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Publication number: 20230139229Abstract: A semiconductor device according to the present disclosure includes a sense source electrode provided separately from a source electrode, and diodes. The diodes are provided between the sense source electrode and a drift layer. A turn-on voltage of each diode is lower than an operating voltage of a p-n diode formed of a sense well region and the drift layer or of a dummy sense well region and the drift layer. The diodes allow a current to flow from the sense source electrode toward a drain electrode. The diodes are provided in such a way that they are mixed with facing areas in a dummy sense region in which dummy sense well regions and the diodes are disposed. Each facing area is an area where one of the dummy sense well regions faces one of the gate electrodes via one of the gate insulating films.Type: ApplicationFiled: May 29, 2020Publication date: May 4, 2023Applicant: Mitsubishi Electric CorporationInventors: Kotaro KAWAHARA, Shiro HINO
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Patent number: 11508840Abstract: In SiC-MOSFETs including Schottky diodes, passage of a bipolar current to a second well region formed in a terminal portion sometimes reduces a breakdown voltage. In a SiC-MOSFET including Schottky diodes according to the present invention, the second well region formed in the terminal portion has a non-ohmic connection to a source electrode, and a field limiting layer lower in impurity concentration than the second well region is formed in a surface layer area of the second well region which is a region facing a gate electrode through a gate insulating film.Type: GrantFiled: May 28, 2020Date of Patent: November 22, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Shiro Hino, Yuichi Nagahisa, Koji Sadamatsu, Hideyuki Hatta, Kotaro Kawahara
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Publication number: 20220254906Abstract: An object of the present invention is to suppress the passage of bipolar current in a silicon carbide semiconductor device by reducing a voltage applied to a terminal well region during reflux operations. An SiC-MOSFET includes a plurality of first well regions, a second well region, a third well region in a surface layer of a drift layer, the first, second, and third well regions being of a second conductivity type. The third well region is provided on the side of the second well region opposite to the first well regions. A unit cell that includes the first well regions includes a unipolar diode. The SiC-MOSFET includes a source electrode connected to the unipolar diode and the ohmic electrode and not having ohmic connection with the second well region and the third well region.Type: ApplicationFiled: September 6, 2019Publication date: August 11, 2022Applicant: Mitsubishi Electric CorporationInventors: Yuichi NAGAHISA, Shiro HINO, Koji SADAMATSU, Kotaro KAWAHARA, Hideyuki HATTA, Shingo TOMOHISA
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Publication number: 20220223583Abstract: In order to improve energization capacity, minority carrier injection efficiency is increased. In a semiconductor device, an IGBT includes a first drift layer, a collector region, a base region, an emitter region, an insulating film, a gate electrode, and a first high carrier lifetime region formed at a position closer to the collector region than the base region and having a longer carrier lifetime than the first drift layer. An FWD includes a second drift layer, an anode region, and a second high carrier lifetime region formed at a position closer to the anode region than a lower surface of the second drift layer and having a longer carrier lifetime than the second drift layer.Type: ApplicationFiled: July 12, 2019Publication date: July 14, 2022Applicant: Mitsubishi Electric CorporationInventors: Kenji HAMADA, Kazuya KONISHI, Kotaro KAWAHARA
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Publication number: 20220013663Abstract: A technique for maintaining maximum unipolar current density while improving I2t tolerance is provided. In a semiconductor device, a first impurity layer and a Schottky interface are formed to sandwich a well layer therebetween. A first impurity layer is formed from an outermost layer of the well layer located closer to the Schottky interface than a source layer to below the source layer. The lower face of the first impurity layer is located below the Schottky interface.Type: ApplicationFiled: November 30, 2018Publication date: January 13, 2022Applicant: Mitsubishi Electric CorporationInventors: Kotaro KAWAHARA, Shiro HINO
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Publication number: 20210226052Abstract: In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.Type: ApplicationFiled: March 16, 2021Publication date: July 22, 2021Applicant: Mitsubishi Electric CorporationInventors: Yuichi NAGAHISA, Shiro HINO, Koji SADAMATSU, Hideyuki HATTA, Kotaro KAWAHARA
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Patent number: 11049963Abstract: In SiC-MOSFETs including Schottky diodes, passage of a bipolar current to a well region in an edge portion of an active region cannot be sufficiently reduced, which may reduce the reliability of elements. In a SiC-MOSFET including Schottky diodes, the Schottky diodes formed in a terminal region are made higher in density in a plane direction than those formed in the active region or intervals between the Schottky diodes in the plane direction are shortened, without an ohmic connection between the well and the source in the terminal region.Type: GrantFiled: December 18, 2018Date of Patent: June 29, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Shiro Hino, Yuichi Nagahisa, Koji Sadamatsu, Hideyuki Hatta, Kotaro Kawahara
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Patent number: 10991822Abstract: In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.Type: GrantFiled: February 22, 2018Date of Patent: April 27, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yuichi Nagahisa, Shiro Hino, Koji Sadamatsu, Hideyuki Hatta, Kotaro Kawahara
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Publication number: 20200295177Abstract: In SiC-MOSFETs including Schottky diodes, passage of a bipolar current to a well region in an edge portion of an active region cannot be sufficiently reduced, which may reduce the reliability of elements. In a SiC-MOSFET including Schottky diodes, the Schottky diodes formed in a terminal region are made higher in density in a plane direction than those formed in the active region or intervals between the Schottky diodes in the plane direction are shortened, without an ohmic connection between the well and the source in the terminal region.Type: ApplicationFiled: December 18, 2018Publication date: September 17, 2020Applicant: Mitsubishi Electric CorporationInventors: Shiro HINO, Yuichi NAGAHISA, Koji SADAMATSU, Hideyuki HATTA, Kotaro KAWAHARA
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Publication number: 20190371936Abstract: In an SiC-MOSFET with a built-in Schottky diode, a bipolar current may be passed in a second well region formed at a terminal part to reduce a breakdown voltage. In the SiC-MOSFET with the built-in Schottky diode, a conductive layer in Schottky connection with the second well region is provided on the second well region in the terminal part, and the conductive layer is electrically connected with a source electrode of the MOSFET. A conductive layer contact hole is provided for connecting only the conductive layer and the source electrode.Type: ApplicationFiled: February 22, 2018Publication date: December 5, 2019Applicant: Mitsubishi Electric CorporationInventors: Yuichi NAGAHISA, Shiro HINO, Koji SADAMATSU, Hideyuki HATTA, Kotaro KAWAHARA
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Patent number: 10134920Abstract: A mesa type p-n junction diode silicon carbide semiconductor device that includes a first silicon carbide semiconductor substrate, a first drift layer formed on the silicon carbide semiconductor substrate, a second anode layer formed on the drift layer, a mesa structure having a flat mesa bottom portion formed in an outer periphery thereof and having a mesa side wall obliquely formed with respect to a top face of the anode layer in a cross-section ranging from the anode layer to the drift layer, a second lightly doped region formed from an edge of the anode layer to the mesa bottom portion, and a second highly doped region formed on the side of the mesa side wall in the lightly doped region in contact with the edge of the anode layer and in a portion connected to the mesa bottom portion at a lower part of the mesa side wall.Type: GrantFiled: October 4, 2016Date of Patent: November 20, 2018Assignee: Mitsubishi Electric CorporationInventors: Kotaro Kawahara, Kohei Ebihara
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Publication number: 20180254354Abstract: A mesa type p-n junction diode silicon carbide semiconductor device that includes a first silicon carbide semiconductor substrate, a first drift layer formed on the silicon carbide semiconductor substrate, a second anode layer formed on the drift layer, a mesa structure having a flat mesa bottom portion formed in an outer periphery thereof and having a mesa side wall obliquely formed with respect to a top face of the anode layer in a cross-section ranging from the anode layer to the drift layer, a second lightly doped region formed from an edge of the anode layer to the mesa bottom portion, and a second highly doped region formed on the side of the mesa side wall in the lightly doped region in contact with the edge of the anode layer and in a portion connected to the mesa bottom portion at a lower part of the mesa side wall.Type: ApplicationFiled: October 4, 2016Publication date: September 6, 2018Applicant: Mitsubishi Electric CorporationInventors: Kotaro KAWAHARA, Kohei EBIHARA
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Patent number: 10020367Abstract: An object of the present invention is to provide a silicon carbide semiconductor device with which the electric field at the time of switching is relaxed and the element withstand voltage can be enhanced. The distance between the outer peripheral end of a second surface electrode and the inner peripheral end of a field insulation film is smaller than the distance between an outer peripheral end of the second surface electrode and an inner peripheral end of the field insulation film in the case where the electric field strength applied to the outer peripheral lower end of the second surface electrode is calculated so as to become equal to the smallest dielectric breakdown strength among the dielectric breakdown strength of the field insulation film and the dielectric breakdown strength of the surface protective film at the time of switching when the value of dV/dt is greater than or equal to 10 kV/?s.Type: GrantFiled: December 15, 2014Date of Patent: July 10, 2018Assignee: Mitsubishi Electric CorporationInventors: Kohei Ebihara, Akihiro Koyama, Hidenori Koketsu, Akemi Nagae, Kotaro Kawahara, Hiroshi Watanabe, Kensuke Taguchi, Shiro Hino
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Publication number: 20170221998Abstract: An object of the present invention is to provide a silicon carbide semiconductor device with which the electric field at the time of switching is relaxed and the element withstand voltage can be enhanced. The distance between the outer peripheral end of a second surface electrode and the inner peripheral end of a field insulation film is smaller than the distance between an outer peripheral end of the second surface electrode and an inner peripheral end of the field insulation film in the case where the electric field strength applied to the outer peripheral lower end of the second surface electrode is calculated so as to become equal to the smallest dielectric breakdown strength among the dielectric breakdown strength of the field insulation film and the dielectric breakdown strength of the surface protective film at the time of switching when the value of dV/dt is greater than or equal to 10 kV/?s.Type: ApplicationFiled: December 15, 2014Publication date: August 3, 2017Applicant: Mitsubishi Electric CorporationInventors: Kohei EBIHARA, Akihiro KOYAMA, Hidenori KOKETSU, Akemi NAGAE, Kotaro KAWAHARA, Hiroshi WATANABE, Kensuke TAGUCHI, Shiro HINO
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Patent number: 6558577Abstract: A deformable conductive elastomer excellent in reliability, linearity, and mechanical characteristics, and a manufacturing method thereof are provided. Elastomer particles with a particle size of 10 through 300 &mgr;m and conductive particles with a particle size of 10 through 40 &mgr;m are almost uniformly dispersed in a non-conductive elastomer. Ceramic particles with a particle size of 1000 nm or less are also almost uniformly dispersed in the non-conductive elastomer. At least the non-conductive elastomer uncrosslinked, the elastomer particles, and the conductive particles are added to the dispersion medium, and the mixture is vibrated, mixed, and dried to crosslink the uncrosslinked non-conductive elastomer. At least the non-conductive elastomer, the elastomer particles, and the conductive particles are added to the dispersion medium, and the mixture is vibrated, mixed, and dried.Type: GrantFiled: April 10, 2000Date of Patent: May 6, 2003Assignees: Inabagomu Co. Ltd.Inventors: Koichi Niihara, Yong-Ho Choa, Manwar Hussain, Hiroshi Nishida, Yoshiyuki Hamahashi, Kotaro Kawahara