Patents by Inventor Koteswararao Nannapaneni

Koteswararao Nannapaneni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Utilization of voltage-controlled currents in electronic systems
    Patent number: 11520364
    Abstract: An electronic system comprising a voltage-to-current converter and a proportional-to-absolute-temperature (PTAT) circuit is disclosed. The voltage-to-current converter is configured to receive one of a control voltage, a supply voltage, a scaled-down version of the control voltage, and a scaled-down version of the supply voltage, and generate a set of currents. The PTAT circuit is coupled with the voltage-to-current converter such that each current of the set of currents is one of sourced to the PTAT circuit and sank from the PTAT circuit. Further, the PTAT circuit is configured to receive at least one of the supply voltage and the control voltage, and generate a set of reference voltages. The control voltage is generated based on the set of reference voltages and the supply voltage.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: December 6, 2022
    Assignee: NXP B.V.
    Inventors: Koteswararao Nannapaneni, Sushil Kumar Gupta
  • UTILIZATION OF VOLTAGE-CONTROLLED CURRENTS IN ELECTRONIC SYSTEMS
    Publication number: 20220179438
    Abstract: An electronic system comprising a voltage-to-current converter and a proportional-to-absolute-temperature (PTAT) circuit is disclosed. The voltage-to-current converter is configured to receive one of a control voltage, a supply voltage, a scaled-down version of the control voltage, and a scaled-down version of the supply voltage, and generate a set of currents. The PTAT circuit is coupled with the voltage-to-current converter such that each current of the set of currents is one of sourced to the PTAT circuit and sank from the PTAT circuit. Further, the PTAT circuit is configured to receive at least one of the supply voltage and the control voltage, and generate a set of reference voltages. The control voltage is generated based on the set of reference voltages and the supply voltage.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 9, 2022
    Inventors: Koteswararao Nannapaneni, Sushil Kumar Gupta
  • CHARGE-CYCLE CONTROL FOR BURST-MODE DC-DC CONVERTERS
    Publication number: 20210211055
    Abstract: A DC-DC converter operates in a burst mode having at least one charge cycle with a charging phase followed by a discharging phase. A charging phase is terminated when an inductor current flowing through an inductance connected to the DC-DC converter reaches a compensated peak-current threshold, wherein the compensated peak-current threshold compensates for charging-phase loop delay. A discharging phase is terminated when the inductor current reaches a compensated valley-current threshold, wherein the compensated valley-current threshold compensates for discharging-phase loop delay.
    Type: Application
    Filed: January 6, 2020
    Publication date: July 8, 2021
    Inventors: Jitendra Prabhakar Harshey, Hendrik Johannes Bergveld, Edevaldo Pereira da Silva Junior, Koteswararao Nannapaneni, Uday Kumar Sajja
  • Charge-cycle control for burst-mode DC-DC converters
    Patent number: 11038427
    Abstract: A DC-DC converter operates in a burst mode having at least one charge cycle with a charging phase followed by a discharging phase. A charging phase is terminated when an inductor current flowing through an inductance connected to the DC-DC converter reaches a compensated peak-current threshold, wherein the compensated peak-current threshold compensates for charging-phase loop delay. A discharging phase is terminated when the inductor current reaches a compensated valley-current threshold, wherein the compensated valley-current threshold compensates for discharging-phase loop delay.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: June 15, 2021
    Assignee: NXP B.V.
    Inventors: Jitendra Prabhakar Harshey, Hendrik Johannes Bergveld, Edevaldo Pereira da Silva, Jr., Koteswararao Nannapaneni, Uday Kumar Sajja