Patents by Inventor Kou-Chio Liu

Kou-Chio Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6265752
    Abstract: The device includes a N+ buried layer in a substrate. A P-well is formed in an epitaxial layer on the buried layer. N-wells surround the P-well are also formed in the epitaxial layer. One of the N-well regions acts as a drain in the structure. A plurality of field oxide regions is formed on the N-well or P-well to define the active area of the device. A gate oxide is formed on the surface of the P-well and the N-well served as the drain. A gate is formed on the gate oxide. Drain contact is formed in the N-well for drain. The source region of the device is formed in the P-well adjacent to the drain. An isolation layer is deposited on the gate. The method includes forming a N+ buried layer in a P substrate. A P epitaxial layer is then formed on the surface of the P substrate. The N-well and P-well are respectively formed in the epitaxial layer by ion implantation and thermally diffusion. A plurality of field oxide (FOX) regions are created to define the active area.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: July 24, 2001
    Assignee: Taiwan Semiconductor Manufacturing, Co., Inc.
    Inventors: Kou-Chio Liu, Jyh-Min Jiang, Chen-Bau Wu, Ruey-Hsin Liou