Patents by Inventor Kouhei Yamada

Kouhei Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140127807
    Abstract: The present invention relates to a composition for promoting differentiation of pluripotent stem cells into cardiac muscle cells, and a method for inducing differentiation of pluripotent stem cells into cardiac muscle cells and a method for preparing cardiac muscle cells
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: KYOTO UNIVERSITY
    Inventors: Norio Nakatsuji, Motonari Uesugi, Kouhei Yamada, Itsunari Minami, Tomomi Otsuji, Shinya Otsuka
  • Patent number: 8658425
    Abstract: The present invention relates to a composition for promoting differentiation of pluripotent stem cells into cardiac muscle cells, and a method for inducing differentiation of pluripotent stem cells into cardiac muscle cells and a method for preparing cardiac muscle cells.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: February 25, 2014
    Assignee: Kyoto University
    Inventors: Norio Nakatsuji, Motonari Uesugi, Kouhei Yamada, Itsunari Minami, Tomomi Otsuji
  • Patent number: 8648624
    Abstract: A voltage-to-current converter circuit has a differential input unit, and is provided with an input offset voltage, wherein the temperature characteristics of the differential input unit and input offset voltage are substantially flat. A current is supplied wherein a second fixed current having positive temperature characteristics is added to a first fixed current having flat characteristics as a bias current to the differential input unit, to balance the temperature characteristics of the differential input unit and the temperature characteristics of the bias current, thus causing the differential input unit transconductance temperature characteristics to be substantially zero (e.g., substantially flat).
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: February 11, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Kouhei Yamada
  • Patent number: 8598914
    Abstract: A comparator circuit can achieve a reduction in current consumption with a simple configuration, and can suppress an increase in current consumption accompanying a rise in power source voltage. A current mirror circuit is connected to a power source, and gates of MOSFETs of the circuit are interconnected. An input signal is applied to a gate of an NMOSFET of the circuit. By determining the value of the signal with a constant voltage device, the voltage across a tail resistor is constant, even in the event that the power source voltage and the input signal change.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: December 3, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Kenichi Nishijima, Kouhei Yamada
  • Publication number: 20130241512
    Abstract: A hysteresis control step-up switching power supply includes a switching element. Current flowing through the switching element does not continue to increase indefinitely. The switching element is turned off when a detected value of an output voltage increases to a reference voltage, or when the output of a current detector circuit that detects that a current flowing through the switching element increases to a reference current value.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 19, 2013
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kouhei YAMADA
  • Patent number: 8471540
    Abstract: A DC-DC converter performing pulse frequency modulation (PFM) control with a fixed ON time, having a control circuit performing PFM control of the ON time for a switch, including an error amplifier amplifying the difference between an output voltage and a target voltage, a voltage controlled oscillator increasing and decreasing in frequency and outputting an error signal, and a one-shot circuit generating the ON time based on a trigger signal output from the VCO, where ON time is linked to an input voltage and/or an output voltage. The switching frequency decreases under light loads and current consumption is reduced, and the switching frequency is made to be approximately constant under heavy loads.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: June 25, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Kouhei Yamada
  • Publication number: 20120286827
    Abstract: A voltage-to-current converter circuit has a differential input unit, and is provided with an input offset voltage, wherein the temperature characteristics of the differential input unit and input offset voltage are substantially flat. A current is supplied wherein a second fixed current having positive temperature characteristics is added to a first fixed current having flat characteristics as a bias current to the differential input unit, to balance the temperature characteristics of the differential input unit and the temperature characteristics of the bias current, thus causing the differential input unit transconductance temperature characteristics to be substantially zero (e.g., substantially flat).
    Type: Application
    Filed: May 11, 2012
    Publication date: November 15, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kouhei YAMADA
  • Publication number: 20120268093
    Abstract: The transient response of an output voltage to a load fluctuation is improved, in a switching power source that carries out a PWM control. In a DC-DC converter wherein a switching element of an output stage is controlled by a drive signal, whose pulse width is set at a minimum value, output from a PWM signal generating circuit based on an output voltage output from an error amplifier in accordance with the difference between a feedback voltage in accordance with an output voltage of the output stage and a reference voltage, there is provided a minimum pulse width detector circuit that supplies a current to a phase compensation capacitor when the pulse width of the drive signal is at the minimum value, thus preventing the output voltage from dropping below a value corresponding to the minimum value when the load fluctuates, and improving transient response characteristics of the output voltage.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 25, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kouhei YAMADA
  • Publication number: 20120223690
    Abstract: A control circuit of a DC-DC converter that has a switching element, including an error amplifier that amplifies a difference between a reference voltage and a feedback voltage corresponding to an output voltage of the DC-DC converter, a voltage reduction comparator that outputs an interrupt signal when the feedback voltage is lower than a voltage reduction threshold that has a value lower than that of the reference voltage, and a pulse-width modulation (PWM) signal generator circuit. The PWM signal generator circuit generates a PWM signal of a predetermined frequency based on the voltage difference when no interrupt signal is generated, or otherwise generates a switch drive signal to activate the switching element for a first period of time corresponding to the difference output by the error amplifier, and to deactivate the switching element for a second period of time after the first period of time has elapsed.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 6, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kouhei YAMADA
  • Patent number: 8253472
    Abstract: In a level shift circuit in a high electric potential side driving circuit, a latch circuit and a transmission circuit located at the front stage of the latch circuit are provided. The transmission circuit makes its output impedance high when two inputs V1 and V2 are detected as low level signals by which erroneous signals due to dv/dt noises can be effectively blocked. In the transmission circuit, since there is no necessity of deliberately increasing delay in part of the circuit for achieving complete blocking, error signals due to dv/dt noises can be blocked with the minimum delay time.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: August 28, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Kenichi Nishijima, Kouhei Yamada
  • Publication number: 20120212205
    Abstract: A control system of a DC to DC converter skips switching pulses according to the output of an overvoltage protection circuit. The overvoltage protection circuit includes an overvoltage threshold voltage control section that lowers an overvoltage threshold voltage when the pulse width has a minimum valve. The control system both improves the output voltage accuracy of the DC to DC converter under a light load and promotes a quick return to normal operation after an overvoltage protection operation under a heavy load.
    Type: Application
    Filed: February 22, 2012
    Publication date: August 23, 2012
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Kouhei YAMADA
  • Patent number: 8174854
    Abstract: A switching power supply system has a control circuit that controls an output voltage by causing a switching device to turn ON and OFF. The control circuit includes a control pulse supplying unit that supplies a pulsed signal that keeps the switching device turned-ON and -OFF. A protection circuit shuts down the switching power supply system upon occurrence of an abnormality. A delay circuit produces a delay signal that delays by a specified time duration the termination of a state of the pulsed signal in which the pulsed signal keeps the switching device turned-ON. The protection circuit is responsive to the pulsed signal or the delay signal to switch between an operation state and a stand-by state.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: May 8, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Satoshi Sugahara, Kouhei Yamada
  • Publication number: 20110298497
    Abstract: A comparator circuit can achieve a reduction in current consumption with a simple configuration, and can suppress an increase in current consumption accompanying a rise in power source voltage. A current mirror circuit is connected to a power source, and gates of MOSFETs of the circuit are interconnected. An input signal is applied to a gate of an NMOSFET of the circuit. By determining the value of the signal with a constant voltage device, the voltage across a tail resistor is constant, even in the event that the power source voltage and the input signal change.
    Type: Application
    Filed: May 25, 2011
    Publication date: December 8, 2011
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi NISHIJIMA, Kouhei Yamada
  • Patent number: 8059437
    Abstract: An integrated circuit, in which the influence of parasitic capacitance between a semiconductor substrate and a resistor and between the semiconductor substrate and a capacitor can be inhibited, and a DC-DC converter provided with the integrated circuit. A shielding layer of an n-type semiconductor is formed between a p-type semiconductor substrate and a resistor formed thereon and between the semiconductor substrate and a capacitor formed thereon. A point BOOT is connected to the shielding layer, at which an electric potential changes in the same way as a change in the reference potential of a functional circuit carrying out a specified operation by using the resistor and the capacitor.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: November 15, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Kouhei Yamada
  • Publication number: 20110230603
    Abstract: The present invention relates to a pigment ink composition that can fulfill excellent print stability, and performances and drying performance of printed matters. The ink composition comprises: at least a pigment; an organic solvent; and two or more kinds of binder resins having different weight average molecular weights (Mw), wherein, when a binder resin having lowest weight average molecular weight (Mw) is marked as ?, and a binder resin having higher weight average molecular weight (Mw) than that of the binder resin ? and meeting formula (3) is marked as ? among the two or more kinds of binder resins to be used, the ink composition meets formulae (1) and (2): Formula (1): Mw??Mw??10,000, Formula (2): 1,000<Mw?<30,000, and Formula (3): 20,000<Mw?<100,000, wherein Mw? represents the weight average molecular weight of the binder resin ?, and Mw? represents the weight average molecular weight of the binder resin ?.
    Type: Application
    Filed: September 4, 2009
    Publication date: September 22, 2011
    Applicant: TOYO INK MFG. CO., LTD.
    Inventors: Atsushi Yoda, Seiji Aida, Ken Yamasaki, Daisuke Fujiwara, Kouhei Yamada, Kazunori Shigemori, Mitsuo Umezawa
  • Patent number: 8013585
    Abstract: An overcurrent detection circuit (50 in FIG. 1) in a DC-DC converter is connected to a switching control circuit (1), and detects an inductor current flowing through an inductor (L) during the ON control of a switching element (Mn), so as to decide whether the inductor current has decreased down to a prescribed value. The switching control circuit (1) alters the switching timing of a control signal to extend the OFF state of a switching element (Mp) until the decrease of the inductor current to a predetermined magnitude is decided by the overcurrent detection circuit (50). Even when a delay is involved in an overcurrent detection operation, the DC-DC converter is still capable of overcurrent limitation.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: September 6, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Kouhei Yamada
  • Patent number: 7906942
    Abstract: A DC-DC converter of a synchronous rectifier type, a control circuit thereof and control method thereof, facilitates detecting and interrupting negative inductor current IL with low power consumption, high accuracy and a simple configuration and facilitates improving the efficiency under a light load. An ON-period decision circuit determines whether an ON-period of the synchronous rectifier switch is too long or too short. An ON-period adjustment circuit generates a signal for adjusting the ON-period, during which the synchronous rectifier switch is ON, based on the decision of the ON-period decision part. A delay circuit adjusts the length of the delay, from the time when a signal changing the ON and OFF states of the synchronous rectifier switch changes to ON, to the time when the synchronous rectifier switch is forcibly turned off based on the adjusting signal.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: March 15, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Satoshi Sugahara, Kouhei Yamada
  • Patent number: 7901556
    Abstract: A gas sensor is equipped with a cover assembly made up of an outer cover and an inner cover in which a gas sensor element is disposed. The outer cover has an outer gas inlet and an outer gas outlet formed closer to a top end of the cover assembly than the outer gas inlet. The inner cover has an inner gas inlet formed closer to the top end of the cover assembly than the outer gas inlet. The inner gas inlet is oriented to minimize the entry of drops of water having entered along with a gas to be measured into the inner cover to avoid splashing of the gas sensor element with the water.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: March 8, 2011
    Assignee: Denso Corporation
    Inventor: Kouhei Yamada
  • Publication number: 20110043269
    Abstract: In a level shift circuit in a high electric potential side driving circuit, a latch circuit and a transmission circuit located at the front stage of the latch circuit are provided. The transmission circuit makes its output impedance high when two inputs V1 and V2 are detected as low level signals by which erroneous signals due to dv/dt noises can be effectively blocked. In the transmission circuit, since there is no necessity of deliberately increasing delay in part of the circuit for achieving complete blocking, error signals due to dv/dt noises can be blocked with the minimum delay time.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 24, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Kenichi Nishijima, Kouhei Yamada
  • Patent number: 7872461
    Abstract: A reverse current stopping circuit includes a synchronous rectification device, a comparator for detecting a reverse current of an inductor, the synchronous rectification device being turned off when the reverse current is detected by the comparator, a reverse current detector circuit for detecting a switching terminal voltage after the synchronous rectification device is turned off, thereby determining a value of the inductor current to decide whether the inductor current is flowing in a reverse direction or a forward direction, and a memory unit for receiving a predetermined output signal from the reverse current detector circuit in accordance with a result of the reverse current detector circuit, and outputting a control signal for an offset voltage in accordance with the predetermined output signal. The offset voltage is changed in accordance with the control signal so as to adjust the inductor current to zero when the synchronous rectification device is turned off.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: January 18, 2011
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventor: Kouhei Yamada