Abstract: A digital electronic still-video camera is capable of performing rapid-sequence photography at high speeds. When a rapid-sequence photographic mode has been set, each of a plurality of frames of image data obtained by such photography is compressed. Image data which forms a single multiple-frame picture is constructed by a set of image data composed of the compressed plurality of frames. Thinning out is performed in order to compress the image data. The image data is successively stored, while being thinned out, at corresponding addresses of an image memory in such a manner that a multiple-frame picture is constructed in the image memory. After photography in the rapid-sequence mode ends, the image data in the image memory is subjected to data compression and then recorded on a memory card.

Abstract: A digital electronic still-video camera is capable of performing rapid-sequence photography at high speeds. When a rapid-sequence photographic mode has been set, each of a plurality of frames of image data obtained by such photography is compressed. Image data which forms a single multiple-frame picture is constructed by a set of image data composed of the compressed plurality of frames. Thinning out is performed in order to compress the image data. The image data is successively stored, while being thinned out, at corresponding addresses of an image memory in such a manner that a multiple-frame picture is constructed in the image memory. After photography in the rapid-sequence mode ends, the image data in the image memory is subjected to data compression and then recorded on a memory card.

Abstract: An IC memory card for storing picture data, character data or similar data. The memory card has an input/output section connectable to a host, a storage implemented by a semiconductor memory, and a controller for writing or reading data out of the storage. The input/output section has a data terminal for receiving an address signal and a data signal each being made up of a plurality of blocks continuously, an address/data discrimination terminal for receiving a bilevel signal for discriminating the address signal and data signal fed to the data terminal from each other, a read/write discrimination terminal for receiving a bilevel signal for discriminating the read-out and write-in of data from each other, and a bus clock input terminal for receiving a bus clock synchronous to each block of the address signal or each block of the data signal.

Abstract: A method of recording data in a memory card having an EEPROM, and a memory card system using the same are provided. A memory card has at least two collective erasure type EEPROM chips where at least one of which is conditioned for a spare memory. When an access of the kind needing overwriting is made to the memory card, data stored in memory locations of the addresses of a corresponding EEPROM chip, except for the address where overwriting is to occur, are copied in the spare memory, and then the EEPROM chip of interest and the spare memory are replaced with each other. The EEPROM chips may be replaced with a plurality of memory blocks or clusters defined in a block erasure type EEPROM.