Patents by Inventor Kouichi Nishimaki

Kouichi Nishimaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5240882
    Abstract: This invention relates to a process and an apparatus for making a substrate of a semiconductor of a monolithic silicon wafer, or the like, for use as a discrete element such as a transistor, diode, or the like. In particular, the invention is directed to re-slicing the silicon wafer into two further pieces, to dope impurity diffused layers on both sides but not to provide any impurity diffused layer in the core portion of the silicon wafer. The re-slicing process is performed from substantially the center portion of its core thickness of the wafer so as to provide each re-sliced surface as a plain surface without any impurity diffused layer and for doping a further new impurity diffused layer, so as to obtain two pieces of a substrate as discrete elements simultaneously from one piece of the wafer by the re-slicing process and apparatus of the invention.
    Type: Grant
    Filed: July 28, 1992
    Date of Patent: August 31, 1993
    Assignee: Naoetsu Electronics Co.
    Inventors: Tsutomu Satoh, Kouichi Nishimaki