Patents by Inventor Kouichi Sawahata

Kouichi Sawahata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9177949
    Abstract: In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector diffusion layer through the emitter diffusion layer, respectively. The bipolar transistor further includes a base diffusion region connected with the second terminal through a first resistance which is different from the current control resistances.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: November 3, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Sawahata
  • Publication number: 20150001679
    Abstract: In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector diffusion layer through the emitter diffusion layer, respectively. The bipolar transistor further includes a base diffusion region connected with the second terminal through a first resistance which is different from the current control resistances.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Kouichi SAWAHATA
  • Patent number: 8860139
    Abstract: In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector diffusion layer through the emitter diffusion layer, respectively. The bipolar transistor further includes a base diffusion region connected with the second terminal through a first resistance which is different from the current control resistances.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: October 14, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Sawahata
  • Patent number: 8513737
    Abstract: An electrostatic discharge (ESD) protection element using an NPN bipolar transistor, includes: a trigger element connected at one end with a pad. The NPN bipolar transistor includes: a first base diffusion layer; a collector diffusion layer connected with the pad; a trigger tap formed on the first base diffusion layer and connected with the other end of the trigger element through a first wiring; and an emitter diffusion layer and a second base diffusion layer formed on the first base diffusion layer and connected in common to a power supply through a second wiring which is different from the first wiring.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: August 20, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Sawahata
  • Patent number: 8502269
    Abstract: A first first-conductivity-type diffusion layer, a first second-conductivity-type diffusion layer, a second first-conductivity-type diffusion layer, and a second second-conductivity-type diffusion layer are arranged in this order. In a region where the second second-conductivity-type diffusion layer and the first-conductivity-type layer are in contact with each other, impurity concentrations thereof are higher in a part in contact with a side face of the second second-conductivity-type diffusion layer than in a part at a bottom surface of the second second-conductivity-type diffusion layer.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: August 6, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Kouichi Sawahata, Masaharu Sato
  • Publication number: 20120032228
    Abstract: A first first-conductivity-type diffusion layer, a first second-conductivity-type diffusion layer, a second first-conductivity-type diffusion layer, and a second second-conductivity-type diffusion layer are arranged in this order. In a region where the second second-conductivity-type diffusion layer and the first-conductivity-type layer are in contact with each other, impurity concentrations thereof are higher in a part in contact with a side face of the second second-conductivity-type diffusion layer than in a part at a bottom surface of the second second-conductivity-type diffusion layer.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 9, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kouichi SAWAHATA, Masaharu SATO
  • Patent number: 8030683
    Abstract: A protection circuit according to an embodiment of the present invention is provided between a first terminal and a second terminal and includes: a capacitor element having one end connected to the second terminal; and a multi-cathode thyristor formed on a semiconductor substrate, and including an anode connected to the first terminal, a first cathode connected to the second terminal, and a second cathode disposed between the anode and the first cathode and connected to another terminal of the capacitor element.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: October 4, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kouichi Sawahata
  • Publication number: 20110006341
    Abstract: An electrostatic discharge (ESD) protection element using an NPN bipolar transistor, includes: a trigger element connected at one end with a pad. The NPN bipolar transistor includes: a first base diffusion layer; a collector diffusion layer connected with the pad; a trigger tap formed on the first base diffusion layer and connected with the other end of the trigger element through a first wiring; and an emitter diffusion layer and a second base diffusion layer formed on the first base diffusion layer and connected in common to a power supply through a second wiring which is different from the first wiring.
    Type: Application
    Filed: June 29, 2010
    Publication date: January 13, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Kouichi SAWAHATA
  • Publication number: 20100230719
    Abstract: In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector diffusion layer through the emitter diffusion layer, respectively. The bipolar transistor further includes a base diffusion region connected with the second terminal through a first resistance which is different from the current control resistances.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 16, 2010
    Applicant: NEC Electronics Corporation
    Inventor: Kouichi SAWAHATA
  • Publication number: 20090244797
    Abstract: A protection circuit according to an embodiment of the present invention is provided between a first terminal and a second terminal and includes: a capacitor element having one end connected to the second terminal; and a multi-cathode thyristor formed on a semiconductor substrate, and including an anode connected to the first terminal, a first cathode connected to the second terminal, and a second cathode disposed between the anode and the first cathode and connected to another terminal of the capacitor element.
    Type: Application
    Filed: March 26, 2009
    Publication date: October 1, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kouichi Sawahata
  • Patent number: 6681201
    Abstract: An electric field distribution is calculated by means of a drift diffusion model, and a one-dimensional electric field distribution is taken out from a result of the calculation, and this electric field distribution which was taken out is provided to a one-dimensional Monte Carlo device simulation to calculate a distribution of impact ionization coefficients, and Gn(x) is calculated by using an equation 1 to an equation 5 which are described below G 1 ⁢   ⁢ ( x ) = 1 q ⁢   ⁢ i n 0 ·
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: January 20, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Kouichi Sawahata
  • Patent number: 6429490
    Abstract: On one side of a shallow trench isolation region formed on the surface of a p type well, an n type source region is provided while on the other side thereof, an n type drain region is provided so as to sandwich the shallow trench isolation region. In the drain region, a bent portion to allow a breakdown current to flow is provided and connected to a gate of a MOSFET comprising a circuit to be protected. Furthermore, a well contact connected to the source region is formed on the well surface and this well contact is grounded. When a positive high voltage which is higher than a predetermine voltage is applied to the drain region, since electric fields concentrate at the bent portion, a breakdown current flows from this bent portion toward the well contact. Thereafter, a current flows between the source and the drain.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: August 6, 2002
    Assignee: NEC Corporation
    Inventor: Kouichi Sawahata
  • Publication number: 20010002717
    Abstract: On one side of a shallow trench isolation region formed on the surface of a p type well, an n type source region is provided while on the other side thereof, an n type drain region is provided so as to sandwich the shallow trench isolation region. In the drain region, a bent portion to allow a breakdown current to flow is provided and connected to a gate of a MOSFET comprising a circuit to be protected. Furthermore, a well contact connected to the source region is formed on the well surface and this well contact is grounded. When a positive high voltage which is higher than a predetermine voltage is applied to the drain region, since electric fields concentrate at the bent portion, a breakdown current flows from this bent portion toward the well contact. Thereafter, a current flows between the source and the drain.
    Type: Application
    Filed: December 1, 2000
    Publication date: June 7, 2001
    Applicant: NEC CORPORATION
    Inventor: Kouichi Sawahata