Patents by Inventor Kouichiro Nagata

Kouichiro Nagata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7826562
    Abstract: An audio controlling device generates an audio mute signal based on the level of a power-supply voltage supplied from the source equipment, whether a clock signal has been input or not, whether a digital signal has been input or not, whether a multiplier circuit is being locked or not, an error rate, whether an audio clock detection circuit is being locked or not, the presence or absence of a change in a control signal, and whether a synchronization detection circuit is stable or not. The audio controlling device applies the audio mute signal to an audio mute circuit, while applying an OSD control signal to an OSD processing circuit. The audio mute circuit is placed in a mute state or unmute state based on the audio mute signal. The OSD processing circuit provides the on-screen display of a message based on the OSD control signal.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: November 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Yutaka Nio, Kouichiro Nagata, Koichi Tanaka
  • Patent number: 7596188
    Abstract: A power-down determination circuit calculates the horizontal frequency and vertical frequency, respectively, employing a clock signal obtained from a multiplier circuit and horizontal synchronization signal and vertical synchronization signal obtained from a TMDS decode circuit. The power-down determination circuit then determines whether an input digital signal does or does not have a decodable video format by comparing the calculated horizontal frequency and vertical frequency with horizontal frequencies and vertical frequencies stored beforehand, for output of a power-down control signal indicative of the determination. Thus, in the case where the input digital signal does not have a decodable format, the power-down control signal controls a video/audio processing circuit to enter a power-down mode.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: September 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Chikara Gotanda, Yutaka Nio, Kouichiro Nagata
  • Publication number: 20060095623
    Abstract: An audio controlling device generates an audio mute signal based on the level of a power-supply voltage supplied from the source equipment, whether a clock signal has been input or not, whether a digital signal has been input or not, whether a multiplier circuit is being locked or not, an error rate, whether an audio clock detection circuit is being locked or not, the presence or absence of a change in a control signal, and whether a synchronization detection circuit is stable or not. The audio controlling device applies the audio mute signal to an audio mute circuit, while applying an OSD control signal to an OSD processing circuit. The audio mute circuit is placed in a mute state or unmute state based on the audio mute signal. The OSD processing circuit provides the on-screen display of a message based on the OSD control signal.
    Type: Application
    Filed: May 27, 2004
    Publication date: May 4, 2006
    Inventors: Yutaka Nio, Kouichiro Nagata, Koichi Tanaka
  • Publication number: 20060077298
    Abstract: A power-down determination circuit calculates the horizontal frequency and vertical frequency, respectively, employing a clock signal obtained from a multiplier circuit and horizontal synchronization signal and vertical synchronization signal obtained from a TMDS decode circuit. The power-down determination circuit then determines whether an input digital signal does or does not have a decodable video format by comparing the calculated horizontal frequency and vertical frequency with horizontal frequencies and vertical frequencies stored beforehand, for output of a power-down control signal indicative of the determination. Thus, in the case where the input digital signal does not have a decodable format, the power-down control signal controls a video/audio processing circuit to enter a power-down mode.
    Type: Application
    Filed: May 27, 2004
    Publication date: April 13, 2006
    Inventors: Chikara Gotanda, Yutaka Nio, Kouichiro Nagata