Abstract: In a tone signal circuit and a wireless receiver of the present invention, a digital signal in a frequency band including at least a tone signal component is input into a Goertzel filter. Further, an envelope of an output from the Goertzel filter is detected, and a derivative value of the envelope is derived. Then, if the derivative value is maintained to be equal to or greater than a first threshold value, it is determined that a first prerequisite for existence of the tone signal component is satisfied. The above tone signal circuit and the wireless receiver can perform highly-accurate tone detection in a small calculation amount.

Abstract: Circuit blocks and respectively convert high-voltage logic signals in which two logical values are expressed by a first signal potential and a second signal potential into low-voltage logic signals in which the two logical values are expressed by a third signal potential at least as large as the first signal potential and a fourth signal potential that is the third signal potential to which a positive voltage has been added and which is no greater than the second signal potential, and outputs the converted logic signals. The transistors in the circuit block are of the form of replacing the respective transistors of the circuit block with elements of opposite polarity, so that when the third signal potential is changed and operation of one of the circuit blocks and becomes difficult, the other operates normally. Consequently, stable level conversion can be accomplished.

Abstract: A PLL circuit comprises a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator (VCO), and two variable voltage sources. The phase detector and the charge pump each comprises low-voltage transistors, and operates with a fixed supply voltage VCC1 (e.g., 5 V) which is a potential difference applied from the variable voltage source of a power-supply voltage VL and the variable voltage source of a power-supply voltage VDC (=VL+VCC1). A tuning control signal VC generated by integrating an output current signal of the charge pump using the loop filter is input to the VCO having an input voltage range of the tuning control signal from 0 V to VCC2 (e.g., 16 V).

Abstract: A charge pump circuit (31), and a PLL circuit using the charge pump circuit, has a glitch compensation circuit (36) to compensate for a slow glitch which occurs along charging/discharging of electric charges in a parasitic capacitance. The glitch compensation circuit (36) includes a comparator (37), a latch circuit (38), a capacitor (C1) and transistors (Q9, Q10) serving as a charge/discharge device. The comparator (37) compares potentials and applies a logic output signal to the latch circuit (38), and the latch circuit (38) in response to output of the comparator, instructs the charge/discharge device to perform a charge or discharge operation to charge or discharge the capacitor so as to allow a potential at a second output terminal to come close to a potential at a first output terminal or a potential at a designated node in a loop filter of the PLL circuit.

Abstract: In a tone signal circuit and a wireless receiver of the present invention, a digital signal in a frequency band including at least a tone signal component is input into a Goertzel filter. Further, an envelope of an output from the Goertzel filter is detected, and a derivative value of the envelope is derived. Then, if the derivative value is maintained to be equal to or greater than a first threshold value, it is determined that a first prerequisite for existence of the tone signal component is satisfied. The above tone signal circuit and the wireless receiver can perform highly-accurate tone detection in a small calculation amount.

Abstract: Circuit blocks and respectively convert high-voltage logic signals in which two logical values are expressed by a first signal potential and a second signal potential into low-voltage logic signals in which the two logical values are expressed by a third signal potential at least as large as the first signal potential and a fourth signal potential that is the third signal potential to which a positive voltage has been added and which is no greater than the second signal potential, and outputs the converted logic signals. The transistors in the circuit block are of the form of replacing the respective transistors of the circuit block with elements of opposite polarity, so that when the third signal potential is changed and operation of one of the circuit blocks and becomes difficult, the other operates normally. Consequently, stable level conversion can be accomplished.

Abstract: A charge pump circuit (31), and a PLL circuit using the charge pump circuit, has a glitch compensation circuit (36) to compensate for a slow glitch which occurs along charging/discharging of electric charges in a parasitic capacitance. The glitch compensation circuit (36) includes a comparator (37), a latch circuit (38), a capacitor (C1) and transistors (Q9, Q10) serving as a charge/discharge device. The comparator (37) compares potentials and applies a logic output signal to the latch circuit (38), and the latch circuit (38) in response to output of the comparator, instructs the charge/discharge device to perform a charge or discharge operation to charge or discharge the capacitor so as to allow a potential at a second output terminal to come close to a potential at a first output terminal or a potential at a designated node in a loop filter of the PLL circuit.

Abstract: A low noise amplifier having a wide operating frequency band and a high dynamic range is provided. A transformer having a secondary winding connected between an input terminal to which an input signal is applied and a positive differential output terminal, and a primary winding connected between a negative differential output terminal and an input node is provided as a feedback circuit between a cascode amplifier circuit, which includes transistors and a resistor, and an output circuit, which includes a transistor and a constant current source. Selective use of a transformer whose leakage inductance has an adequate value as the feedback transformer can realize a low noise amplifier which has a wide operating frequency band and a high dynamic range.

Abstract: A PLL circuit comprises a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator (VCO), and two variable voltage sources. The phase detector and the charge pump each comprises low-voltage transistors, and operates with a fixed supply voltage VCC1 (e.g., 5 V) which is a potential difference applied from the variable voltage source of a power-supply voltage VL and the variable voltage source of a power-supply voltage VDC (=VL+VCC1). A tuning control signal VC generated by integrating an output current signal of the charge pump using the loop filter is input to the VCO having an input voltage range of the tuning control signal from 0 V to VCC2 (e.g., 16 V).

Abstract: A differential amplifier comprises a left amplifier having transistors, a right amplifier having transistors, a negative feedback network having a resistor, and a negative feedback network having a transformer with a center tap. Phase compensation networks comprising a capacitor and a resistor, a capacitor and a resistor, and a capacitor and a resistor are further added to the amplifier. Both ends of a secondary winding of the transformer are connected to the output terminals of the right and left amplifiers, and the center tap of the secondary winding is grounded, so that a differential amplified output signal can be fed back to a single-phase input using one transformer, thereby reducing a cost and an area.

Abstract: A low noise amplifier having a wide operating frequency band and a high dynamic range is provided. A transformer having a secondary winding connected between an input terminal to which an input signal is applied and a positive differential output terminal, and a primary winding connected between a negative differential output terminal and an input node is provided as a feedback circuit between a cascode amplifier circuit, which includes transistors and a resistor, and an output circuit, which includes a transistor and a constant current source. Selective use of a transformer whose leakage inductance has an adequate value as the feedback transformer can realize a low noise amplifier which has a wide operating frequency band and a high dynamic range.

Abstract: In a double-loop negative feedback low noise amplifier having double negative feedback paths by a feedback transformer and a feedback resistor added to a cascode amplifier comprising transistors and a resistor, a phase compensation circuit comprising a capacitor and a resistor is added between the output terminal of the double-loop negative feedback low noise amplifier and the input terminal of the cascode amplifier, i.e., the input terminal of the input transistor, and a phase compensation circuit comprising a capacitor and a resistor is added to the upper-stage transistor of the cascode amplifier, i.e., the input terminal of the upper-stage transistor. Those phase compensation circuits enable a low noise negative feedback amplifier which maintains a high feedback loop gain to a high frequency band, has a wider bandwidth than a conventional one, and has a high dynamic range.

Abstract: A differential amplifier comprises a left amplifier having transistors, a right amplifier having transistors, a negative feedback network having a resistor, and a negative feedback network having a transformer with a center tap. Phase compensation networks comprising a capacitor and a resistor, a capacitor and a resistor, and a capacitor and a resistor are further added to the amplifier. Both ends of a secondary winding of the transformer are connected to the output terminals of the right and left amplifiers, and the center tap of the secondary winding is grounded, so that a differential amplified output signal can be fed back to a single-phase input using one transformer, thereby reducing a cost and an area.

Abstract: In a double-loop negative feedback low noise amplifier having double negative feedback paths by a feedback transformer and a feedback resistor added to a cascode amplifier comprising transistors and a resistor, a phase compensation circuit comprising a capacitor and a resistor is added between the output terminal of the double-loop negative feedback low noise amplifier and the input terminal of the cascode amplifier, i.e., the input terminal of the input transistor, and a phase compensation circuit comprising a capacitor and a resistor is added to the upper-stage transistor of the cascode amplifier, i.e., the input terminal of the upper-stage transistor. Those phase compensation circuits enable a low noise negative feedback amplifier which maintains a high feedback loop gain to a high frequency band, has a wider bandwidth than a conventional one, and has a high dynamic range.

Abstract: A variable gain amplifier includes signal amplifying transistor and first and second gain control transistors at output and non-output sides, whose emitters are connected to collector of signal amplifying transistor. The amplifier includes non-output load provided between collector of second gain control transistor and a power source, and equal to output load connected between collector of first gain control transistor and the power source. The amplifier includes non-output side negative feedback path provided between collector of second gain control transistor and an input terminal of signal amplifying transistor, and formed in same circuit form with same circuit constant as a negative feedback path running from an output terminal of first gain control transistor to the input terminal. The amplifier includes current dividing circuit which divides biasing currents between the two paths to flow the currents at same ratio as the current division ratio between first and second gain control transistors.

Abstract: Variable gain amplifier includes signal amplifying transistor, and gain control transistors at output and non-output sides. Emitters or sources of gain control transistors at output and non-output sides are connected to collector or drain of signal amplifying transistor. Output load is connected between collector or drain of gain control transistor at output side and power source side. Load is connected between collector or drain of gain control transistor at non-output side and power source side. Output load and load have the same impedance. Negative feedback path is connected between output end of gain control transistor at output side and input end of signal amplifying transistor. Negative feedback path is also connected between output end of gain control transistor at non-output side and input end of signal amplifying transistor. Two negative feedback paths have the same circuit constant. A differential amplifier is formed of a pair of such variable gain amplifiers.

Abstract: A variable gain amplifier includes signal amplifying transistor and first and second gain control transistors at output and non-output sides, whose emitters are connected to collector of signal amplifying transistor. The amplifier includes non-output load provided between collector of second gain control transistor and a power source, and equal to output load connected between collector of first gain control transistor and the power source. The amplifier includes non-output side negative feedback path provided between collector of second gain control transistor and an input terminal of signal amplifying transistor, and formed in same circuit form with same circuit constant as a negative feedback path running from an output terminal of first gain control transistor to the input terminal. The amplifier includes current dividing circuit which divides biasing currents between the two paths to flow the currents at same ratio as the current division ratio between first and second gain control transistors.

Abstract: Variable gain amplifier includes signal amplifying transistor, and gain control transistors at output and non-output sides. Emitters or sources of gain control transistors at output and non-output sides are connected to collector or drain of signal amplifying transistor. Output load is connected between collector or drain of gain control transistor at output side and power source side. Load is connected between collector or drain of gain control transistor at non-output side and power source side. Output load and load have the same impedance. Negative feedback path is connected between output end of gain control transistor at output side and input end of signal amplifying transistor. Negative feedback path is also connected between output end of gain control transistor at non-output side and input end of signal amplifying transistor. Two negative feedback paths have the same circuit constant. A differential amplifier is formed of a pair of such variable gain amplifiers.