Patents by Inventor Kouji Moriguchi
Kouji Moriguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9617655Abstract: An apparatus for SIC single crystal has an induction heating control unit such that frequency f (Hz) of alternating current to the induction heating unit satisfies Formula (1); D1 (mm) is permeation depth of electromagnetic waves into a crucible side wall by the heating unit, D2 (mm) is permeation depth of electromagnetic waves into a SIC solution, T (mm) is thickness of the crucible side wall of the crucible, and R (mm) is crucible inner radius: (D1?T)×D2/R>1.5??(1) where, D1 is defined by Formula (2) and D2 by Formula (3): D1=503292×(1/(f×?c×?c))1/2??(2) D2=503292×(1/(f×?s×?s))1/2??(3); ?c is electric conductivity (S/m) of the sidewall, ?s is electric conductivity (S/m) of the SiC solution; ?c is relative permeability of the sidewall, and ?s is relative permeability of the SIC solution.Type: GrantFiled: December 26, 2011Date of Patent: April 11, 2017Assignees: NIPPON STEEL & SUMITOMO METAL CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Nobuhiro Okada, Kazuhito Kamei, Kazuhiko Kusunoki, Nobuyoshi Yashiro, Kouji Moriguchi, Hironori Daikoku, Hiroshi Suzuki, Tomokazu Ishii, Hidemitsu Sakamoto, Motohisa Kado, Yoichiro Kawai
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Patent number: 9512540Abstract: A method for manufacturing an n-type SiC single crystal, enables the suppression of the variation in nitrogen concentration among a plurality of n-type SiC single crystal ingots manufactured. A method includes the steps of: providing a manufacturing apparatus (100) including a chamber (1) having an area in which a crucible (7) is to be disposed; heating the area in which the crucible (7) is to be disposed and evacuating the gas in the chamber (1); filling, after the evacuation, the chamber (1) with a mixed gas containing a noble gas and nitrogen gas; heating and melting a starting material housed in the crucible (7) disposed in the area to produce a SiC solution (8) containing silicon and carbon; and immersing a SiC seed crystal into the SiC solution under the mixed gas atmosphere to grow an n-type SiC single crystal on the SiC seed crystal.Type: GrantFiled: November 4, 2011Date of Patent: December 6, 2016Assignees: NIPPON STEEL & SUMITOMO METAL CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Kazuhiko Kusunoki, Kazuhito Kamei, Nobuyoshi Yashiro, Kouji Moriguchi, Nobuhiro Okada, Katsunori Danno, Hironori Daikoku
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Publication number: 20130284083Abstract: A manufacturing apparatus for SiC single crystal has a control unit to control induction heating such that frequency f (Hz) of alternating current to be passed to the induction heating unit satisfies Formula (1); D1 (mm) is permeation depth of electromagnetic waves into a side wall of a crucible by the heating unit, D2 (mm) is permeation depth of electromagnetic waves into a SiC solution, T (mm) is thickness of the crucible side wall of the crucible, and R (mm) is crucible inner radius: (D1?T)×D2/R>1??(1) where, D1 is defined by Formula (2), and D2 by Formula (3): D1=503292×(1/(f×?c×?c))1/2??(2) D2=503292×(1/(f×?s×?s))1/2??(3); ?c is electric conductivity (S/m) of the sidewall, ?s is electric conductivity (S/m) of the SiC solution; ?c is relative permeability of the sidewall, and ?s relative permeability of the SiC solution.Type: ApplicationFiled: December 26, 2011Publication date: October 31, 2013Applicants: Toyota Jidosha Kabushiki Kaisha, Nippon Steel & Sumitomo Metal CorporationInventors: Nobuhiro Okada, Kazuhito Kamei, Kazuhiko Kasunoki, Nobuyoshi Yashiro, Kouji Moriguchi, Hironori Daikoku, Hiroshi Suzuki, Tomokazu Ishii, Hidemitsu Sakamoto, Motohisa Kado, Yoichiro Kawai
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Publication number: 20130220212Abstract: A method for manufacturing an n-type SiC single crystal, enables the suppression of the variation in nitrogen concentration among a plurality of n-type SiC single crystal ingots manufactured. A method includes the steps of: providing a manufacturing apparatus (100) including a chamber (1) having an area in which a crucible (7) is to be disposed; heating the area in which the crucible (7) is to be disposed and evacuating the gas in the chamber (1); filling, after the evacuation, the chamber (1) with a mixed gas containing a noble gas and nitrogen gas; heating and melting a starting material housed in the crucible (7) disposed in the area to produce a SiC solution (8) containing silicon and carbon; and immersing a SiC seed crystal into the SiC solution under the mixed gas atmosphere to grow an n-type SiC single crystal on the SiC seed crystal.Type: ApplicationFiled: November 4, 2011Publication date: August 29, 2013Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Kazuhiko Kusunoki, Kazuhito Kamei, Nobuyoshi Yashiro, Kouji Moriguchi, Nobuchiro Okada, Katsunori Danno, Hironori Daikoku
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Patent number: 6707128Abstract: A semiconductor device comprises a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type, a base layer of a second conductivity type provided in the first semiconductor layer, for defining a vertical MISFET including source regions and a gate electrode on a gate insulation film, a Schottky barrier diode (SBD)-forming region provided in the first semiconductor layer around the base layer, a guard ring region of the second conductivity type provided around SBD-forming region, a first main electrode disposed above the first semiconductor layer and provided in common as both a source electrode of the MISFET and an anode of the SBD, a surface gate electrode disposed above the first semiconductor layer, and a second main electrode provided in common as a drain electrode of the MISFET and a cathode of the SBD.Type: GrantFiled: June 10, 2002Date of Patent: March 16, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Kouji Moriguchi, Yoshitaka Hokomoto
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Publication number: 20020190340Abstract: A semiconductor device comprises a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type, a base layer of a second conductivity type provided in the first semiconductor layer, for defining a vertical MISFET including source regions and a gate electrode on a gate insulation film, a Schottky barrier diode (SBD)-forming region provided in the first semiconductor layer around the base layer, a guard ring region of the second conductivity type provided around SBD-forming region, a first main electrode disposed above the first semiconductor layer and provided in common as both a source electrode of the MISFET and an anode of the SBD, a surface gate electrode disposed above the first semiconductor layer, and a second main electrode provided in common as a drain electrode of the MISFET and a cathode of the SBD.Type: ApplicationFiled: June 10, 2002Publication date: December 19, 2002Inventors: Kouji Moriguchi, Yoshitaka Hokomoto
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Patent number: 5068706Abstract: A semiconductor device includes a radiation plate, first and second conductive patterns formed on one surface of the radiation plate, a first semiconductor element fixed on and connected to the first conductive pattern, a second semiconductor element fixed on and connected to the second conductive pattern, a conductive member for connecting the first and second semiconductor elements to each other, a first external terminal electrically connected to the first conductive pattern, a second external terminal electrically connected to the second conductive pattern, a third external terminal electrically connected to the conductive member, and an outer casing, which is filled with epoxy resin, for enclosing the semiconductor elements and the first to third external terminals. Part of each of the first to third external terminals is exposed to an exterior of the casing. At least one of the conductive member, first external terminal, second external terminal, and third external terminal includes a hollow fuse.Type: GrantFiled: February 12, 1990Date of Patent: November 26, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Naomasa Sugita, Yoshiharu Yotumoto, Kouji Moriguchi, Toshinobu Sekiba
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Patent number: 4943842Abstract: A semiconductor device includes a radiation plate, first and second conductive patterns formed on one surface of the radiation plate, a first semiconductor element fixed on and connected to the first conductive pattern, a second semiconductor element fixed on and connected to the second conductive pattern, a conductive member for connecting the first and second semiconductor elements to each other, a first external terminal electrically connected to the first conductive pattern, a second external terminal electrically connected to the second conductive pattern, a third external terminal electrically connected to the conductive member, and an outer casing, which is filled wiht epoxy resin, for enclosing the semiconductor elements and the first to third external terminals. Part of each of the first to third external terminals is exposed to an exterior of the casing. At least one of the conductive member, first external terminal, second external terminal, and third external terminal includes a hollow fuse.Type: GrantFiled: March 9, 1988Date of Patent: July 24, 1990Assignee: Kabushiki Kaisha ToshibaInventors: Naomasa Sugita, Yoshiharu Yotumoto, Kouji Moriguchi, Toshinobu Sekiba