Patents by Inventor Kouji Tomita

Kouji Tomita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9845999
    Abstract: A liquid-cooled-type cooling device includes a casing having a top wall, a bottom wall, and a cooling-liquid passage, and a radiating member disposed in the cooling-liquid passage. The radiating member has a substrate and a plurality of pin-shaped fins. Longitudinally intermediate portions of the pin-shaped fins are brazed to the substrate. The substrate has a plurality of fin insertion holes, and the pin-shaped fins are inserted into the fin insertion holes of the substrate. A plurality of convex portions are integrally formed on the longitudinally intermediate portion of each pin-shaped fin. The substrate and the pin-shaped fins are provisionally fixed together by plastically deforming the convex portions such that they are crushed. In this state, the substrate and the pin-shaped fins are brazed together. The upper and lower end portions of the pin-shaped fins are brazed to the top wall and bottom wall, respectively, of the casing.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: December 19, 2017
    Assignee: SHOWA DENKO K.K.
    Inventors: Seiji Matsushima, Kouji Tomita
  • Publication number: 20130284404
    Abstract: A liquid-cooled-type cooling device includes a casing having a top wall, a bottom wall, and a cooling-liquid passage, and a radiating member disposed in the cooling-liquid passage. The radiating member has a substrate and a plurality of pin-shaped fins. Longitudinally intermediate portions of the pin-shaped fins are brazed to the substrate. The substrate has a plurality of fin insertion holes, and the pin-shaped fins are inserted into the fin insertion holes of the substrate. A plurality of convex portions are integrally formed on the longitudinally intermediate portion of each pin-shaped fin. The substrate and the pin-shaped fins are provisionally fixed together by plastically deforming the convex portions such that they are crushed. In this state, the substrate and the pin-shaped fins are brazed together. The upper and lower end portions of the pin-shaped fins are brazed to the top wall and bottom wall, respectively, of the casing.
    Type: Application
    Filed: November 7, 2012
    Publication date: October 31, 2013
    Inventors: Seiji Matsushima, Kouji Tomita
  • Patent number: 7247515
    Abstract: A frame for a semiconductor package has die-pads supported with suspending leads of individual lead frames. Semiconductor devices are arranged on the die-pads. These semiconductor devices are collectively molded with molding compound, and then the collectively molded semiconductor packages are cut into individual packages by means of a dicing saw. In the frame, suspending leads are formed into fish tails, wherein at least one of a longitudinal grid-lead and a transverse grid-lead is eliminated within areas enclosed with fish tails of the suspending leads. Accordingly, whether an R-shape generated by producing the frame by etching is large or small, the existence of metal pieces at the edges of the semiconductor packages is substantially prevented.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: July 24, 2007
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6897549
    Abstract: A frame for a semiconductor package has die-pads supported with suspending leads of individual lead frames. Semiconductor devices are arranged on the die-pads. These semiconductor devices are collectively molded with molding compound, and then the collectively molded semiconductor packages are cut into individual packages by means of a dicing saw. In the frame, suspending leads are formed into fish tails, wherein at least one of a longitudinal grid-lead and a transverse grid-lead is eliminated within areas enclosed with fish tails of the suspending leads. Accordingly, whether an R-shape generated by producing the frame by etching is large or small, the existence of metal pieces at the edges of the semiconductor packages is substantially prevented.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: May 24, 2005
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20050106777
    Abstract: A frame for a semiconductor package has die-pads supported with suspending leads of individual lead frames. Semiconductor devices are arranged on the die-pads. These semiconductor devices are collectively molded with molding compound, and then the collectively molded semiconductor packages are cut into individual packages by means of a dicing saw. In the frame, suspending leads are formed into fish tails, wherein at least one of a longitudinal grid-lead and a transverse grid-lead is eliminated within areas enclosed with fish tails of the suspending leads. Accordingly, whether an R-shape generated by producing the frame by etching is large or small, the existence of metal pieces at the edges of the semiconductor packages is substantially prevented.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 19, 2005
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6882048
    Abstract: A lead frame used for the production of a semiconductor package, wherein each of terminals of the lead frame to be wire-bonded to electrodes provided on the top surface of the semiconductor device has one or two groove(s) for limiting a plating area of noble metal. Since grooves are provided in each terminal, the accuracy of the plating area can be easily checked visually. Further, the grooves absorb stress applied to the terminal when the molded semiconductor packages are individually separated from each other by punching or dicing, and the situation where molding compound comes off of the terminal is prevented. In addition, since the grooves absorb vibrational stress applied to the terminal after mounting a semiconductor on the printed circuit board, the reliability of assembly is improved.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: April 19, 2005
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6744118
    Abstract: A frame for a semiconductor package includes plural lead frames arranged through grid-leads in a matrix. Semiconductor devices are mounted on individual lead frames of the frame, and are molded with molding compound. Thereafter, the molded semiconductor devices are cut at grid-leads by means of a dicing saw so that individual semiconductor packages are obtained. The frame further has groove portions which are formed by etching the frame from the front or back at areas corresponding to grid-leads, so that the grid-leads are made thin which reduces burrs and the generation of metal powders and dust.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: June 1, 2004
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6703694
    Abstract: A frame for semiconductor packages has die-pads supported with suspending leads of individual lead frames. Semiconductor devices are mounted on the respective die-pads. These semiconductor devices are collectively molded with molding compound, and then the collectively molded semiconductor packages are cut into individual packages by means of a dicing saw. In the frame, thin parts are formed in areas corresponding to the roots of individual terminals, the thin parts being formed by half-etching metal of the areas from the front or back thereof. Alternatively, hollows are formed in areas corresponding to the roots of individual terminals.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: March 9, 2004
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6703696
    Abstract: A semiconductor package is comprised of a semiconductor device 4 mounted on a die-pad 3, a wire 6 for electrically connecting some electrodes of the semiconductor device 4 and terminals 5 of lead frame, wires 8 for bonding the other electrodes of semiconductor device to the surface of die-pad for grounding, and molding compound 7 for encapsulating the outer area of semiconductor device 4 under a state where the back face of die-pad 3. The lower face and side face of terminals 5 are exposed, wherein portions plated with silver for connecting of wires on the surface of the die-pad are formed at points positioned between a peripheral edge of the die-pad and an outer edge of the semiconductor device while leaving spaces from both the edges. The adhesion of die-pad 3 to bonding compound 7 is improved to avoid the occurrence of wires coming-off even if heat is applied to the contact points of die-pad 3 to wires 8 when mounting semiconductor package on a printed circuit board.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: March 9, 2004
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita, Tsuyoshi Tsunoda
  • Publication number: 20030098503
    Abstract: A frame F for semiconductor package has die-pads 3 supported with suspending leads 2 of individual lead frames 10. Semiconductor devices are arranged on die-pads 3. These semiconductor devices are collectively molded with molding compounds, and then the collectively molded semiconductor packages are cut into individual packages by means of dicing saw. In the frame F, suspending leads are formed into fish tails, wherein at least one of longitudinal grid-lead and transverse grid-lead is eliminated within areas enclosed with fish tails of the suspending leads 2. Accordingly, whether R-shape generated by producing frame for semiconductor package by etching process is large or small, to exist metal piece at edges of semiconductor packages in dicing becomes almost nothing.
    Type: Application
    Filed: January 13, 2003
    Publication date: May 29, 2003
    Applicant: Dainippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20020149090
    Abstract: A lead frame of the present invention is a lead frame used for the production of semiconductor package, wherein each of terminals to be wire-bonded of the lead frame between electrodes provided on the top surface of semiconductor device mounted on a die pad and the terminals has one or two groove(s) for limiting plating area of noble metal for wire-bonding. A semiconductor package of the present invention is produced using the lead frame. Since grooves are provided in each terminal, the accuracy of plating area can be easily checked by visual observation. Accordingly, the cut of inspection cost can be carried out. Further, the grooves absorb stress applied to terminal when molded semiconductor packages are separated individually from each other by means of punching or dicing. Accordingly, coming off of molding compound from terminal is prevented.
    Type: Application
    Filed: March 21, 2002
    Publication date: October 17, 2002
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20020048851
    Abstract: Semiconductor devices are mounted on die-pads supported with suspending leads of lead frames, and wire-bonding of electrodes provided on the top face of semiconductor devices to terminals of lead frames is made. Then, semiconductor devices are individually molded. Thereafter, individually molded semiconductor devices are stamped out to form individual semiconductor packages. In the above-mentioned process for making a semiconductor packages, resin tapes are stuck on the backside of terminals prior to the molding process, and the resin tapes are removed after the molding process. Since resin passes around behind terminals during the molding process, the occurrence of thin burrs on the backside of terminals are not found. Further, the satisfactory soldering plating in the mounting process of semiconductor packages can be secured without the process for removing burrs from the backside of terminals in which the process for removing burrs has been carried out conventionally.
    Type: Application
    Filed: July 13, 2001
    Publication date: April 25, 2002
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20020027297
    Abstract: A semiconductor package is comprised of a semiconductor device 4 mounted on a die-pad 3, a wire 6 for electrically connecting some electrodes of the semiconductor device 4 and terminals 5 of lead frame, wires 8 for bonding the other electrodes of semiconductor device to the surface of die-pad for grounding, molding compound 7 for encapsulating the outer area of semiconductor device 4 under a state where the back face of die-pad 3, the lower face and side face of terminals 5 are exposed, wherein portions for plated with silver connecting of wires on the surface of the die-pad are formed at points positioned between a peripheral edge of the die-pad and an outer edge of the semiconductor device with leaving spaces from both the edges. The adhesion of die-pad 3 to bonding compound 7 is improved so that no trouble of coming-off of wires occur even if heat is applied to the contact points of die-pad 3 to wires 8 when mounting semiconductor package on a printed circuit board.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 7, 2002
    Inventors: Chikao Ikenaga, Kouji Tomita, Tsuyoshi Tsunoda
  • Publication number: 20010045630
    Abstract: A frame F for semiconductor package has die-pads 3 supported with suspending leads 2 of individual lead frames 10. Semiconductor devices are mounted on die-pads 3. These semiconductor devices are collectively molded with molding compounds, and then the collectively molded semiconductor packages are cut into individual packages by means of dicing saw. In the frame F, thin parts are formed in areas corresponding to neighborhood of the roots of individual terminals, the thin parts being formed by half-cutting by etching metal of the areas from the front or back thereof. Or, hollows are formed in areas corresponding to neighborhood of the roots of individual terminals, Accordingly, it is inhibited that increased sectional area of terminals is formed, so that intervals between adjacent terminals 5 are sufficiently kept. Accordingly, accidents such as soldered bridge do not occur.
    Type: Application
    Filed: May 7, 2001
    Publication date: November 29, 2001
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20010045628
    Abstract: A frame F for semiconductor package has die-pads 3 supported with suspending leads 2 of individual lead frames 10. Semiconductor devices are arranged on die-pads 3. These semiconductor devices are collectively molded with molding compounds, and then the collectively molded semiconductor packages are cut into individual packages by means of dicing saw. In the frame F, suspending leads are formed into fish tails, wherein at least one of longitudinal grid-lead and transverse grid-lead is eliminated within areas enclosed with fish tails of the suspending leads 2. Accordingly, whether R-shape generated by producing frame for semiconductor package by etching process is large or small, to exist metal piece at edges of semiconductor packages in dicing becomes almost nothing.
    Type: Application
    Filed: May 7, 2001
    Publication date: November 29, 2001
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Publication number: 20010042904
    Abstract: Frame F comprises plural lead frames 10 arranged through grid-leads L in matrix. Semiconductor devices are mounted on individual lead frames 10 of frame F, respectively and collectively molded with molding compound. Thereafter, the collectively molded semiconductor devices are cut at grid-leads L by means of dicing saw so that individual semiconductor packages are obtained. The frame F further has groove portions. The groove portions are formed by half-cutting by etching a metal of frame F from the front or back at areas corresponding to grid-leads, so that grid-frames are made thin. When a width of groove portions is larger than a width of dicing saw, cut burrs are reduced. When a width of groove portions is smaller than a width of dicing saw, the occurrence of metal powder dusts is restrained and time required for cutting becomes smaller.
    Type: Application
    Filed: May 7, 2001
    Publication date: November 22, 2001
    Inventors: Chikao Ikenaga, Kouji Tomita
  • Patent number: 6051735
    Abstract: There is disclosed a process for prevention the polymerization of a vinyl compound selected from acrylic acid and methacrylic acid which comprises allowing at least one corrosion inhibitive substance selected from an alcohol and inorganic acid or salt thereof, an aromatic carboxylic acid or salt thereof and a zinc-containing salt to coexist with a metallic salt of dithiocarbamic acid, in prevention the polymerization of the vinyl compound with the metallic salt of dithiocarbamic acid.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: April 18, 2000
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Kenji Okamoto, Takashi Nakagawa, Hideaki Mimaki, Kouji Tomita
  • Patent number: 5886220
    Abstract: There is disclosed a process for preventing the polymerization of a vinyl compound which comprises allowing water in an amount of 0.05 to 5% by weight based on the vinyl compound or a corrosion inhibitive substance selected from an alcohol, an inorganic acid or its salt, an aromatic carboxylic acid or its salt and a zinc-containing salt in an amount of preferably 0.01 to 5% by weight based on the same, to coexist with a metallic salt of dithiocarbamic acid, in preventing the polymerization of the vinyl compound with the metallic salt of dithiocarbamic acid. The above process makes it possible to effectively inhibit the polymerization of acrylic acid, methacrylic acid, etc. in the distillation system, etc. of the production process for the above acids as well as the corrosion of the equipment and machinery to be used therein and also to assure long-term stable continuous operation of the equipment and machinery.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: March 23, 1999
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Kenji Okamoto, Takashi Nakagawa, Hideaki Mimaki, Kouji Tomita
  • Patent number: 5856568
    Abstract: A process for inhibiting polymerization of a vinyl compound comprising using (A) one or both of N-nitrosophenylhydroxylamine and a salt thereof in combination with (B) a salt of copper or in combination with (B') a metal salt of a dialkyldithiocarbamic acid and (C) at least one selected from the group consisting of inorganic acids, salts of inorganic acids, and water.In accordance with the above process, stable continuous operation of a process for producing a vinyl compound, particularly acrylic acid or methacrylic acid, such as a distillation process of the vinyl compound, for a long time is enabled by effectively suppressing polymerization of the vinyl compound in the process or by effectively suppressing polymerization of the vinyl compound in the process while corrosion of the apparatus for the production is prevented.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: January 5, 1999
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Kenji Okamoto, Takashi Nakagawa, Kouji Tomita
  • Patent number: 4835308
    Abstract: A process for producing trimellitic acid by oxidizing pseudocumene with a molecular oxygen-containing gas in an acetic acid solvent in the presence of a catalyst comprising one or more cobalt compounds, one or more manganese compounds, and one or more bromine compounds, wherein the total amount of the cobalt compound is in the range of 0.01-1.0% by weight of the acetic acid solvent based on the weight of cobalt metal, the total amount of the manganese compound is in the range of 0.01-0.1% by weight of the acetic acid solvent based on the weight of manganese metal, the total amount of the bromine compound is in the range of 0.01-2.0% by weight of the acetic acid solvent based on the weight of bromine atoms, with the proviso that the atomic ratio of bromine to cobalt and manganese [Br/(Co+Mn)] is in the range of 2.51-2.99, which process comprises at least two reaction-stages comprising the preceding reaction-stage in which the reaction temperature is maintained in the range of 110.degree. to 180.degree. C.
    Type: Grant
    Filed: September 4, 1987
    Date of Patent: May 30, 1989
    Assignee: Idemitsu Petrochemical Co., Ltd.
    Inventors: Yasuzo Sakakibara, Ken-ichi Ueda, Kouji Tomita