Abstract: A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

Abstract: A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: The semiconductor device comprises a capacitor including a storage electrode 76, a capacitor dielectric film formed on the storage electrode 76, and a plate electrode formed on the capacitor dielectric film 78, the storage electrode 76 having an upper end rounded and having a larger thickness at the upper end than a thickness in the rest region. Whereby electric field concentration on the upper end of the storage electrode can be mitigated, and leakage current increase and dielectric breakdown of the capacitor dielectric film can be precluded.

Abstract: A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

Abstract: A vehicle lighting device has a housing, a plurality of light guides extending in radial fashion from the substantially center part of the housing, a reflector within the housing, and a plurality of LED light sources. The surface of each light guide has a reflective region with a reflecting means along the longitudinal direction thereof and an transmissive region in which the reflecting means is not provided. The transmissive region faces forward, and the reflective region faces rearward. The reflector is disposed further to the rear than the light guides, and in opposition to the reflective regions. Each LED light source is in proximity to one end of a light guide.

Abstract: A small light-source module has a module body having a small single-point light source with a limited light-emitting angle mounted thereto, and a reflective surface provided on the module body. The light axis of the light source tilted with respect to the reflective surface, so as to create a substantially fan-shape projected light region on the reflective surface. The outer contour of the reflective surface is also substantially fan-shaped, and the reflective surface has a reflective pattern for reflecting light emitted form the small single-point light source as parallel light.

Abstract: The semiconductor device comprises a capacitor including a storage electrode 76, a capacitor dielectric film formed on the storage electrode 76, and a plate electrode formed on the capacitor dielectric film 78, the storage electrode 76 having an upper end rounded and having a larger thickness at the upper end than a thickness in the rest region. Whereby electric field concentration on the upper end of the storage electrode can be mitigated, and leakage current increase and dielectric breakdown of the capacitor dielectric film can be precluded.