Patents by Inventor Kouju Aoki

Kouju Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080012718
    Abstract: An amplifier 1 is arranged to amplify a sense signal from a sensor with low current consumption while maintaining sufficient sensitivity. The amplifier 1 comprises a detection circuit 2 which detects a signal level of the sense signal and outputs an alarm signal when the sense signal is in a first signal level range R1, and a variable gain amplifier 3 which, based on a detection result of the detection circuit 2, stops an amplifying operation when the sense signal is in the first signal level range R1, performs the amplifying operation at a first gain G1 when the sense signal is in a second signal level range R2, or performs the amplifying operation at a second gain G2 larger than the first gain G1 when the sense signal is in a third signal level range R3 defined between the first and second signal level ranges.
    Type: Application
    Filed: June 20, 2007
    Publication date: January 17, 2008
    Inventors: Kouju Aoki, Takahiro Watai, Hiroyuki Sakima, Masaya Mizutani, Takuya Okajima
  • Patent number: 5424590
    Abstract: An input signal is provided at first input terminals of a plurality of parallel AND gates in a delay time control circuit. A digital signal from a decoder having a plurality of bits is coupled to second input terminals of the AND gates with one bit coupled per AND gate. The decoder outputs a signal having an a high level in response to an external input control signal. Output signals from the AND gates are coupled to inputs of a plurality of serially connected OR gates.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: June 13, 1995
    Assignees: Fujitsu Limited, Fujitsu Vlsi Limited
    Inventors: Kenichi Sato, Moriaki Mizuno, Kouju Aoki
  • Patent number: 5248909
    Abstract: A level converting circuit converts a first signal which has an ECL level which is used in an ECL device into a second signal which has a GaAs logic level which is used in a GaAs device which is based on a GaAs substrate.
    Type: Grant
    Filed: July 29, 1992
    Date of Patent: September 28, 1993
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Kouju Aoki, Hideji Sumi, Moriaki Mizuno, Tetsuya Aisaka
  • Patent number: 5162676
    Abstract: A circuit has a level converting circuit for converting a signal having level in conformance with a first logic system into a signal having a level in conformance with a second logic system.
    Type: Grant
    Filed: March 15, 1991
    Date of Patent: November 10, 1992
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Kouju Aoki, Hideji Sumi, Moriaki Mizuno, Tetsuya Aisaka