Patents by Inventor Koutarou Satou

Koutarou Satou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7806332
    Abstract: To provide a semiconductor device capable of securely executing a reading operation to improve a reliability of read data, an IC tag including the semiconductor device, and a control method for the IC tag. A semiconductor device according to an embodiment of the present invention includes: a power supply voltage generating circuit for generating a power supply voltage based on a received radio signal; a power supply voltage generating circuit for detecting the power supply voltage; a memory area for storing predetermined data; a reading/writing circuit using different operation voltages for reading data from the memory area and writing data to the memory area; and a control circuit for executing a data reading operation for the memory area based on a detected power supply voltage.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: October 5, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Koutarou Satou
  • Patent number: 7774517
    Abstract: An information processing apparatus according to an embodiment of the present invention includes: a CPU; a plurality of peripheral devices connected to the CPU through a bus; and a peripheral access protection setting unit storing access protection information representing whether an access to each of the peripheral devices is permitted or inhibited in accordance with a task to be performed by the CPU, wherein an access by the CPU to the peripheral devices is limited based on the access protection information and address information of the peripheral device.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: August 10, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Koutarou Satou, Hitoshi Suzuki
  • Publication number: 20080005427
    Abstract: An information processing apparatus according to an embodiment of the present invention includes: a CPU; a plurality of peripheral devices connected to the CPU through a bus; and a peripheral access protection setting unit storing access protection information representing whether an access to each of the peripheral devices is permitted or inhibited in accordance with a task to be performed by the CPU, wherein an access by the CPU to the peripheral devices is limited based on the access protection information and address information of the peripheral device.
    Type: Application
    Filed: June 6, 2007
    Publication date: January 3, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Koutarou Satou, Hitoshi Suzuki
  • Publication number: 20070024426
    Abstract: By canceling the invalidation, there is provided an IC tag that can be reused after the IC tag's function was invalidated. An IC tag according to an embodiment operates in accordance with a standard protocol and a non-standard protocol and includes a control circuit for switching an operational mode, when receiving a KILL command during an operation based on the standard protocol, to an invalidated state based on the non-standard protocol, and when receiving a KILL cancel command during an operation based on the non-standard protocol, to a normal state based on the standard protocol.
    Type: Application
    Filed: July 27, 2006
    Publication date: February 1, 2007
    Inventors: Kazuhiro Akiyama, Koutarou Satou, Hatsuhide Igarashi
  • Publication number: 20060175420
    Abstract: To provide a semiconductor device capable of securely executing a reading operation to improve a reliability of read data, an IC tag including the semiconductor device, and a control method for the IC tag. A semiconductor device according to an embodiment of the present invention includes: a power supply voltage generating circuit for generating a power supply voltage based on a received radio signal; a power supply voltage generating circuit for detecting the power supply voltage; a memory area for storing predetermined data; a reading/writing circuit using different operation voltages for reading data from the memory area and writing data to the memory area; and a control circuit for executing a data reading operation for the memory area based on a detected power supply voltage.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 10, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Koutarou Satou