Patents by Inventor Kouzi Hashimoto

Kouzi Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5193159
    Abstract: When a coprocessor communicates a plurality of data items with a master processor and a memory according to a bus access cycle activated by the master processor, the coprocessor is supplied therein with information indicating a data storage position as a data transfer source or destination. The master processor and coprocessor independently monitor the number of the sequence of data transfers or the end of the sequence of data transfer operations. As a consequence, when executing a sequence of plural data transfer operations, the coprocessor need not receive a command from the master processor for each data transfer thereto. Further, it is not required for the coprocessor to indicate the end of the sequence of data transfer cycles to the master processor since the master processor can determine this on its own.
    Type: Grant
    Filed: June 3, 1991
    Date of Patent: March 9, 1993
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd.
    Inventors: Kouzi Hashimoto, Atsushi Hasegawa, Ikuya Kawasaki, Kazuhiko Iwasaki
  • Patent number: 5170474
    Abstract: A method for searching the memory of a data processing apparatus including a decoder for decoding the contents of an instruction and an execution unit for executing is performed in response to an instruction based on an output from the decoder, the search instruction which identifies a desired data storage area from a plurality of data storage areas in the memory which includes an array data structure.
    Type: Grant
    Filed: September 24, 1991
    Date of Patent: December 8, 1992
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Ken Sakamura, Kouzi Hashimoto, Ikuya Kawasaki, Atsushi Hasegawa, Kazuhiko Iwasaki
  • Patent number: 5073856
    Abstract: A method for searching the memory of a data processing apparatus including a decoder for decoding the contents of an instruction and an execution unit for executing the instruction based on an output from the decoder is performed in response to a search instruction which identifies a desired data storage area from a plurality of data storage areas in the memory which includes an array data structure.
    Type: Grant
    Filed: March 26, 1990
    Date of Patent: December 17, 1991
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Inc.
    Inventors: Ken Sakamura, Kouzi Hashimoto, Ikuya Kawasaki, Atsushi Hasegawa, Kazuhiko Iwasaki
  • Patent number: 4926321
    Abstract: A method for searching the memory of a data processing apparatus including a decoder for decoding the contents of an instruction and an execution unit for executing the instruction based on an output from the decoder is performed in response to a search instruction which identifies a desired data storage area from a plurality of data storage areas in the memory which includes an array data structure.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: May 15, 1990
    Assignees: Ken Sakamura, Hitachi, Ltd., Hitachi Microcomputer, Engineering, Ltd.
    Inventors: Ken Sakamura, Kouzi Hashimoto, Ikuya Kawasaki, Atsushi Hasegawa, Kazuhiko Iwasaki