Patents by Inventor Kouzi Tanagawa

Kouzi Tanagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5052002
    Abstract: An EEPROM system with an error detecting function includes: a memory cell matrix composed of a plurality of MOS memory cells and a plurality of bit lines connected separately to the plurality of MOS memory cells; and a plurality of intermediate state detecting circuits connected separately to the plurality of bit lines for detecting an intermediate state other than writing and erasing states of the MOS memory cells, and for outputting an error bit indicating signal, the intermediate state being a threshold voltage between a threshold voltage of a storage MOS memory cell in a writing state included in each of the MOS memory cells and a threshold voltage of the storage MOS memory cell in an erasing state.
    Type: Grant
    Filed: August 20, 1990
    Date of Patent: September 24, 1991
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kouzi Tanagawa
  • Patent number: 4901320
    Abstract: In a nonvolatile memory device or a microcomputer with a nonvolatile memory, data errors arising from loss of charge in the floating gates of memory cells are detected and corrected by applying two different sense voltages to the memory cells and comparing the outputs. Instead of using a cumbersome error-correcting code, this error-correcting scheme requires only one parity bit per word, yet it can detect and correct errors in any odd number of bits. Benefits include reduced chip size and longer life for electrically erasable and programmable memories.
    Type: Grant
    Filed: August 31, 1988
    Date of Patent: February 13, 1990
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kikuzo Sawada, Kouzi Tanagawa, Nobuhiro Tomari, Tomoaki Yoshida
  • Patent number: 4843224
    Abstract: In IC card with a built-in IC, comprising an external power supply terminal and a solar battery, the external power supply terminal is connected to an IC internal power supply line through a first switch, the solar battery is connected to the IC internal power supply line through a second switch, and a voltage detection circuit is connected to the external power supply terminal. When the voltage detection circuit detects a voltage on the external power supply terminal, it switches ON the first switch and switches OFF the second switch. When it does not detect a voltage on the external power supply terminal it switches OFF the first switch and switches ON the second switch.
    Type: Grant
    Filed: June 6, 1988
    Date of Patent: June 27, 1989
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Satoshi Ohta, Kouzi Tanagawa
  • Patent number: 4812634
    Abstract: An IC card having a plastics card body which mounts a CPU, a RAM, a ROM, a solar battery mounts also to EEPROM (electrically erasable programmable read only memory), which is used for identification of a card owner. Due to high power consumption of said EEPROM, a tandem type solar battery in which a plurality of opto-electric conversion cells are laminated on a substrate is used. The present IC card can operate with only the solar battery mounted inside of the IC card, and has no secondary battery.
    Type: Grant
    Filed: July 12, 1988
    Date of Patent: March 14, 1989
    Assignees: Oki Electric Industry Co., Ltd., Toa Nenryo Kogyo Kabushiki Kaisha
    Inventors: Satoshi Ohta, Kouzi Tanagawa, Hideo Yamamoto, Keiji Kumagai