Patents by Inventor Kris Myny

Kris Myny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11799563
    Abstract: A method of generating ultrasound by driving an array of ultrasonic transducers comprises a charge transfer procedure. The charge transfer procedure comprises switching a terminal of a first ultrasonic transducer of the array, at a first electric potential, to a charge distribution bus; switching a terminal of a second ultrasonic transducer of the array, at a second electric potential different than the first potential, to the charge distribution bus; and allowing charge to flow between the first ultrasonic transducer and the second ultrasonic transducer through the charge distribution bus.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: October 24, 2023
    Assignees: Imec vzw, Katholieke Universiteit Leuven
    Inventors: Jonas Pelgrims, Kris Myny, Wim Dehaene
  • Publication number: 20230309966
    Abstract: This patent disclosure relates to an ultrasound transducer including an array of ultrasound transducing elements, a plurality of transducer drive lines. The ultrasound transducer further includes an array of control circuits, wherein each individual control circuit includes a drive switch and a memory element, the drive switch comprising at least one thin-film transistor, the memory element being configured to store and control the state of the drive switch.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 5, 2023
    Inventors: Florian De Roose, Kris Myny
  • Patent number: 11647641
    Abstract: A photo-sensitive device comprises: an active layer configured to generate charges in response to incident light; a charge transport layer arranged below the active layer, wherein the charge transport layer comprises a first portion and a second portion being laterally displaced in relation to the first portion; a gate separated by a dielectric material from the charge transport layer, wherein said gate is arranged below the first portion and configured to control a potential thereof; and a transfer gate, which is separated by a dielectric material from a transfer portion of the charge transport layer between the first portion and the second portion, wherein the transfer gate is configured to control transfer of accumulated charges in the first portion to the second portion for read-out of detected light.
    Type: Grant
    Filed: December 6, 2020
    Date of Patent: May 9, 2023
    Assignee: IMEC VZW
    Inventors: Jiwon Lee, Pierre Boulenc, Kris Myny
  • Publication number: 20220349749
    Abstract: A charge sensor element includes a charge collecting detector configured to generate an intensity signal indicative of an amount of charge at an internal charge sensor element node, an amplifier transistor that is electrically connected to the internal charge sensor element node and configured to amplify the intensity signal, and a reset transistor that is electrically connected to the internal charge sensor element node and configured to reset the intensity signal. The amplifier transistor or the reset transistor includes a front gate and a back gate that are configured to control the amplifier transistor or the reset transistor.
    Type: Application
    Filed: April 19, 2022
    Publication date: November 3, 2022
    Inventors: Aris Siskos, Florian De Roose, Kris Myny, Wim Dehaene
  • Publication number: 20220223643
    Abstract: An image sensor comprises at least two vertically stacked photo-sensitive devices wherein each respective photo-sensitive device comprises a stack of a top electrode, a first charge transport layer and an active layer. Each respective stack generates electrical charges in response to a corresponding predefined range of wavelengths of light incident on the image sensor. Each photo-sensitive device further comprises a second charge transport layer having a first portion, vertically aligned underneath the active layer, and a second portion, transfer region, protruding laterally to extend beyond the active layer. A dielectric layer separates the first portion from a bottom electrode providing a voltage for depleting the first portion, and the transfer region from a transfer gate providing a voltage for transferring the generated electrical charge to a floating electrical connection, shared by all stacked photo-sensitive devices. The floating electrical connection couples to a read-out-circuitry.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 14, 2022
    Inventors: Jiwon Lee, Kris Myny, Florian De Roose, Pierre Boulenc
  • Publication number: 20220199002
    Abstract: A compensated current mirror circuit comprises a current mirror with a primary current path and a secondary current path, configured to mirror a current through the primary current path to the secondary current path. The current is settable by switching a reference current through a reference current line into the primary current path. A primary current mirror transistor is connected in series with the primary current path. A secondary current mirror transistor is connected in series with the secondary current path. A gate of the primary current mirror transistor is connected to a gate of the secondary current mirror transistor at a current mirror node. A compensation block is connected to a back gate of the secondary current mirror transistor and to one or more compensation control lines, and is configured to apply a compensation signal at the back gate based on the compensation control lines.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Publication number: 20220201821
    Abstract: A pixel circuit for driving a light-emitting diode (LED) comprises a current-mirror, comprising a primary current path and a secondary current path, arranged to mirror a current through the primary current path to the secondary current path. The current through the primary current path is settable by switching a reference current into the primary current path through a reference current line. The secondary current path is configured to drive the LED. The pixel circuit also includes a switch component arranged to switch the LED to and from the secondary current path based on one or more switch control lines.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 23, 2022
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene, Wim Van Eessen, Patrick Willem
  • Patent number: 11271283
    Abstract: Example embodiments relate to monolithically integrated antenna devices. One embodiment includes a monolithically integrated antenna device that includes a substrate having a first surface and a second surface. The monolithically integrated antenna device also includes a transistor component layer that includes at least one electronic component therein. Further, the monolithically integrated antenna device includes at least one antenna structure formed on the substrate or the transistor component layer. The antenna structure is configured to operate in a frequency range of between 30 kHz and 2.4 GHz. The substrate is configured to have a size that is the same or larger than the at least one antenna structure. The at least one antenna structure is formed in a stack with the transistor component layer and the substrate. The monolithically integrated antenna device is configured to shield the at least one electronic component in the transistor component layer from electromagnetic interference.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: March 8, 2022
    Assignee: IMEC vzw
    Inventors: Alexander Mityashin, Soeren Steudel, Kris Myny, Nikolaos Papadopoulos, Vlatko Milosevski, Paul Heremans
  • Publication number: 20210306079
    Abstract: A method of generating ultrasound by driving an array of ultrasonic transducers comprises a charge transfer procedure. The charge transfer procedure comprises switching a terminal of a first ultrasonic transducer of the array, at a first electric potential, to a charge distribution bus; switching a terminal of a second ultrasonic transducer of the array, at a second electric potential different than the first potential, to the charge distribution bus; and allowing charge to flow between the first ultrasonic transducer and the second ultrasonic transducer through the charge distribution bus.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 30, 2021
    Inventors: Jonas Pelgrims, Kris Myny, Wim Dehaene
  • Publication number: 20210175287
    Abstract: A photo-sensitive device comprises: an active layer configured to generate charges in response to incident light; a charge transport layer arranged below the active layer, wherein the charge transport layer comprises a first portion and a second portion being laterally displaced in relation to the first portion; a gate separated by a dielectric material from the charge transport layer, wherein said gate is arranged below the first portion and configured to control a potential thereof; and a transfer gate, which is separated by a dielectric material from a transfer portion of the charge transport layer between the first portion and the second portion, wherein the transfer gate is configured to control transfer of accumulated charges in the first portion to the second portion for read-out of detected light.
    Type: Application
    Filed: December 6, 2020
    Publication date: June 10, 2021
    Inventors: Jiwon LEE, Pierre BOULENC, Kris MYNY
  • Patent number: 10978000
    Abstract: A method for driving an active matrix display comprising a plurality of pixels, wherein each pixel comprises a drive transistor having a driver gate, is disclosed. The method comprises: receiving information of a desired image to be displayed; determining a compensated voltage for the driver gate for each pixel based on calibration data, wherein the calibration data comprises a set of individual calibration values applying to different pixels, and wherein the compensated voltage compensates for differences between pixels affecting a relation of an intensity of light output by the pixel as function of a difference between the voltage applied to the driver gate and a threshold voltage of the drive transistor; and outputting the compensated voltage for the driver gate for each of the pixels.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: April 13, 2021
    Assignee: IMEC vzw
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Publication number: 20200395652
    Abstract: Example embodiments relate to monolithically integrated antenna devices. One embodiment includes a monolithically integrated antenna device that includes a substrate having a first surface and a second surface. The monolithically integrated antenna device also includes a transistor component layer that includes at least one electronic component therein. Further, the monolithically integrated antenna device includes at least one antenna structure formed on the substrate or the transistor component layer. The antenna structure is configured to operate in a frequency range of between 30 kHz and 2.4 GHz. The substrate is configured to have a size that is the same or larger than the at least one antenna structure. The at least one antenna structure is formed in a stack with the transistor component layer and the substrate. The monolithically integrated antenna device is configured to shield the at least one electronic component in the transistor component layer from electromagnetic interference.
    Type: Application
    Filed: December 21, 2018
    Publication date: December 17, 2020
    Inventors: Alexander Mityashin, Soeren Steudel, Kris Myny, Nikolaos Papadopoulos, Vlatko Milosevski, Paul Heremans
  • Patent number: 10637477
    Abstract: The disclosure relates to a logic circuit. The logic circuit comprises a first thin film transistor, TFT, having a gate connected to an input of the logic circuit, and a drain connected to an output of the logic circuit. The logic circuit further comprises a second TFT having a source connected to the output of the logic circuit. The logic circuit further comprises a third TFT having a gate connected to the input of the logic circuit, a source connected to the source of the second TFT, and a drain connected to a gate of the second TFT. The logic circuit further comprises a fourth TFT having a gate connected to the output of the logic circuit, and a source connected to the gate of the second TFT and the drain of the third TFT.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: April 28, 2020
    Assignee: IMEC VZW
    Inventor: Kris Myny
  • Publication number: 20200007130
    Abstract: The disclosure relates to a logic circuit. The logic circuit comprises a first thin film transistor, TFT, having a gate connected to an input of the logic circuit, and a drain connected to an output of the logic circuit. The logic circuit further comprises a second TFT having a source connected to the output of the logic circuit. The logic circuit further comprises a third TFT having a gate connected to the input of the logic circuit, a source connected to the source of the second TFT, and a drain connected to a gate of the second TFT. The logic circuit further comprises a fourth TFT having a gate connected to the output of the logic circuit, and a source connected to the gate of the second TFT and the drain of the third TFT.
    Type: Application
    Filed: June 24, 2019
    Publication date: January 2, 2020
    Inventor: Kris Myny
  • Publication number: 20190355308
    Abstract: A method for driving an active matrix display comprising a plurality of pixels, wherein each pixel comprises a drive transistor having a driver gate, is disclosed. The method comprises: receiving information of a desired image to be displayed; determining a compensated voltage for the driver gate for each pixel based on calibration data, wherein the calibration data comprises a set of individual calibration values applying to different pixels, and wherein the compensated voltage compensates for differences between pixels affecting a relation of an intensity of light output by the pixel as function of a difference between the voltage applied to the driver gate and a threshold voltage of the drive transistor; and outputting the compensated voltage for the driver gate for each of the pixels.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 21, 2019
    Inventors: Lynn Verschueren, Kris Myny, Jan Genoe, Wim Dehaene
  • Publication number: 20190175018
    Abstract: A system for sensing a parameter of a living being may comprise a thin film transistor (TFT) unit being configured for attachment to a body part of the living being. The TFT unit may comprise at least one sensor with associated sensor circuitry for sensing the parameter of the living being. The system may further comprise an electronic unit, wherein the electronic unit and the TFT unit are configured for (i) detachably physically connecting the electronic unit to the TFT unit or (ii) arranging the electronic unit on the body part in physical contact with the TFT unit, and wherein the TFT unit and the electronic unit interface over a wireless contact for powering the TFT unit by the electronic unit and for communicating sensing results from the TFT unit to the electronic unit.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 13, 2019
    Applicants: IMEC VZW, Stichting IMEC Nederland
    Inventors: Salvatore Polito, Kris Myny