Abstract: A logic state transition sensor circuit. The logic state transition sensor circuit detects and records transitions in voltage corresponding to a transition of a digital logic state (high to low; low to high). The logic state transition sensor circuit may include a sensing circuit containing sensing and amplification elements and a recording circuit containing recording elements. When a logic state transition occurs at an input of the sensing circuit, a positive logic pulse may be generated. Propagation of the logic pulse to the recording circuit causes a charge to be transferred to an output stage capacitor. Repeated logic state transitions cause similar incremental increases in the charge of the output stage capacitor. Charge transfer is governed by ratios of capacitors internal to the recording circuit and hence may be insensitive to process variation. The output stage capacitor may output a voltage representative of a number of logic state transitions sensed.

Abstract: A power distribution management apparatus for supplying power to two or more loads includes a power and clock distribution controller capable of determining voltage, current and clock signal frequency targets for the loads. The apparatus also includes two or more power sources responsive to the controller so as to be selectively coupled with the loads to provide the target voltage and current to the loads. The power sources have switching frequencies of at least one megahertz. The apparatus further includes two or more clock signal sources responsive to the controller and coupled with the loads so as to provide clock signals to the loads at the target frequencies.

Abstract: A DC to DC voltage converter. The converter includes a voltage step-up device and a rectifier connected to an output of the voltage step-up device providing an output of the DC to DC voltage converter. The converter further includes a switch triggering the voltage doubler each time the output of the DC to DC voltage converter falls below a threshold voltage, the voltage step-up device, rectifier and switch all being fabricated as part of a single integrated circuit.

Abstract: A tunable capacitor includes a first capacitor formed from semiconductor material and having a first terminal defining an anode, and a second capacitor integrally formed with the first capacitor from semiconductor material, the second capacitor being operatively coupled in series with the first capacitor, and having a second terminal defining a cathode. The second capacitor is formed as a field effect device or MOSFET configured to provide a depletion region controlled by applying a control voltage to a control terminal of the field effect device. The first capacitor is reverse biased by application of a reverse bias voltage between the anode and the cathode to provide a predetermined capacitance while the control voltage applied to the control terminal of the second capacitor varies the depletion region such that the capacitance of second capacitor is varied independently of the reverse bias voltage.

Abstract: A multi-cellular power field effect semiconductor device has compact cells including a heavily doped portion of a body region which is self-aligned with respect to an aperture in the gate electrode. The intercept of this heavily doped portion of the body region with the upper surface of the device may also be self-aligned with respect to the aperture and the gate electrode. A method of producing the device is also disclosed.

Abstract: A multi-cellular power field effect semiconductor device has compact cells including a heavily doped portion of a body region which is self-aligned with respect to an aperture in the gate electrode. The intercept of this heavily doped portion of the body region with the upper surface of the device may also be self-aligned with respect to the aperture and the gate electrode. A method of producing the device is also disclosed.

Abstract: A multi-cellular power field effect semiconductor device includes a high conductivity layer of metal or a metal silicide disposed in intimate contact with the source region of the device. This high conductivity layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this high conductivity layer allows a substantially smaller contact window to be employed for making contact between the final metallization and the source region. As a consequence, the aperture in the gate electrode and the cell size of the device can both be substantially reduced. The device has substantially improved operating characteristics. A method of producing the device is also described.

Abstract: A multi-cellular power field effect semiconductor device includes a tungsten silicide/polysilicon/oxide gate electrode stack with low sheet resistance. Preferably, a layer of tungsten is also disposed in intimate contact with the source region of the device. This tunsten layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this tungsten layer greatly reduces the resulting ohmic contact resistance to the region. If desired, a tunsten layer can also be disposed in contact with the drain region of the device, again, to lower ohmic contact resistance. The device has substantially improved operating characteristics. Novel processes for producing the device are also described.