Patents by Inventor Krishna Thangaraj

Krishna Thangaraj has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087630
    Abstract: Embodiments are disclosed for a system that includes a data scrubbing circuit, a magnetoresistive random access memory (MRAM) having a memory array, and an analog persistent vital information circuit (APVIC) that performs a method. The method includes resetting weights corresponding to blocks of the memory array. The method further includes adjusting the weights based on a timer, data accesses on the memory blocks, and weight change values corresponding to the weights. The method also includes determining, in response to the timer, a data scrubbing threshold based on ambient temperature and magnetic field strength. The method additionally includes determining one of the weights meets the data scrubbing threshold. Further, the method includes providing, in response to the determination, an indication that a data scrubber, scrub one of the memory blocks corresponding to the weight that meets the data scrubbing threshold. Also, the method includes resetting the weight.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: Heng Wu, Krishna Thangaraj, Eric Raymond Evarts
  • Publication number: 20230418504
    Abstract: A memory system for storage access monitoring is provided. The memory system includes a media controller of a memory. An analog persistent circuit is coupled to the media controller and configured to monitor access to the memory. The analog persistent circuit stores persistent data related to memory access counts access signals from the command/address bus. A command/address bus is coupled to the analog persistent circuit. A memory array is communicatively coupled to the command address and the media controller.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Krishna Thangaraj, Heng Wu, Eric Raymond Evarts
  • Patent number: 11520510
    Abstract: In an approach to extending the lifespan of a flash-based storage device, responsive to receiving a signal from a storage device that the storage device is low on extra blocks, one or more free logical blocks that are no longer needed are released. The storage device is notified of the one or more free logical blocks that are no longer needed. Responsive to determining that the number of valid physical blocks is greater than the number of used logical blocks, the advertised capacity of the storage device is reduced.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: December 6, 2022
    Assignee: International Business Machines Corporation
    Inventors: Krishna Thangaraj, Kenneth Galbraith, James Edouard, Brittany Ross, Hubertus Franke
  • Publication number: 20220269599
    Abstract: According to one embodiment of the present invention, a computer-implemented method for dynamically altering a frequency at which data scrubbing is performed on a memory device is disclosed. The computer-implemented method includes monitoring at least one of a temperature and a magnetic field of the memory device. The computer-implemented method further includes, responsive to determining that at least one of the temperature and the magnetic field of the memory device reaches and/or exceeds a predetermined threshold, respectively, increasing the frequency at which data scrubbing is performed on the memory device.
    Type: Application
    Filed: February 25, 2021
    Publication date: August 25, 2022
    Inventors: Dimitri Houssameddine, Heng Wu, Krishna Thangaraj
  • Patent number: 11119676
    Abstract: Disclosed is a computer implemented method to mark data as persistent using spare bits. The method includes receiving, by a memory system, a set of data, wherein the set of data includes a subset of meta-bits, and the set of data is received as a plurality of transfers, and wherein the memory system includes a first rank and a second rank. The method also includes decoding, by a decoder, the subset of meta-bits, wherein the subset of meta-bits are configured to indicate the set of data is important. The method further includes storing, based on the decoding, the set of data in a persistent storage medium.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: September 14, 2021
    Assignee: International Business Machines Corporation
    Inventors: Krishna Thangaraj, David D. Cadigan, Kevin M. Mcilvain
  • Publication number: 20210141550
    Abstract: Disclosed is a computer implemented method to mark data as persistent using spare bits. The method includes receiving, by a memory system, a set of data, wherein the set of data includes a subset of meta-bits, and the set of data is received as a plurality of transfers, and wherein the memory system includes a first rank and a second rank. The method also includes decoding, by a decoder, the subset of meta-bits, wherein the subset of meta-bits are configured to indicate the set of data is important. The method further includes storing, based on the decoding, the set of data in a persistent storage medium.
    Type: Application
    Filed: November 8, 2019
    Publication date: May 13, 2021
    Inventors: Krishna Thangaraj, David D. Cadigan, Kevin M. McIlvain