Patents by Inventor Kuan Ting CHOU

Kuan Ting CHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162007
    Abstract: Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. The apparatus and methods disclosed herein can be useful to at least minimize or eliminate a microloading effect created while processing small dimension features that have differing densities across various regions of a substrate. The plasma processing methods and apparatus described herein are configured to improve the control of various characteristics of the generated plasma and control an ion energy distribution (IED) of the plasma generated ions that interact with a surface of a substrate during plasma processing.
    Type: Application
    Filed: November 10, 2022
    Publication date: May 16, 2024
    Inventors: Deyang LI, Sunil SRINIVASAN, Yi-Chuan CHOU, Shahid RAUF, Kuan-Ting LIU, Jason A. KENNEY, Chung LIU, Olivier P. JOUBERT, Shreeram Jyoti DASH, Aaron EPPLER, Michael Thomas NICHOLS
  • Publication number: 20230021136
    Abstract: Embodiment discloses a photomask and a photomask fixing device. The photomask includes a photomask body. The photomask body includes a first side surface and a second side surface arranged in parallel, and a pattern surface connecting the first side surface and the second side surface. The first side surface and the second side surface are respectively provided with a plurality of fixing holes configured for fitting with a fixing portion to fix the photomask body. In the above photomask, two parallel side surfaces positioned on the pattern surface are used as fixing surface of the photomask, i.e., the first side surface and the second side surface. The first side surface and the second side surface are respectively provided with a plurality of fixing holes configured for fitting with the fixing portion configured to fix the photomask, to strengthen fixation of the photomask.
    Type: Application
    Filed: September 2, 2021
    Publication date: January 19, 2023
    Inventor: KUAN-TING CHOU
  • Publication number: 20220050374
    Abstract: A protective film with high hardness and low friction coefficient includes an interface layer, a buffer layer, and a high-hardness passivation layer. The protective film has good wear resistance and low friction coefficient and can be applied to a mask package box for photolithography such as a deep ultraviolet (DUV) lithography, an extreme ultraviolet (EUV) lithography, an immersion lithography and a multiple patterning lithography of the photovoltaic and semiconductor industries. The protective film is used to protect the mask package box applied for photolithographic exposure and ensure the yield of the photolithographic process.
    Type: Application
    Filed: November 26, 2020
    Publication date: February 17, 2022
    Applicant: Feedback Technology Corp.
    Inventors: Tsung Feng Wu, Yu Yen Tsai, Wen-Lian Lee, Hui Huan Yu, Kuan Ting Chou
  • Publication number: 20120244459
    Abstract: A mask for evaluating overlay error comprises a plurality of replicate device regions and an overlay mark. The plurality of replicate device regions are disposed uniformly on the mask, wherein each comprises a plurality of device patterns; and a plurality of current layer check patterns are formed adjacent to the plurality of device patterns. The overlay mark is formed on the corner of the mask's peripheral region. In particular, the current layer check patterns are configured to evaluate the pattern offset of a current mask, and the overlay mark and the current layer check patterns are configured to evaluate the overlay error by performing an exposure process using the current mask and a next mask.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 27, 2012
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Kuan Ting CHOU, Pei Cheng FAN