Patents by Inventor Kuan-Yi Lee

Kuan-Yi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002714
    Abstract: A method of forming a semiconductor device includes forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers over a substrate, the first semiconductor layers and the second semiconductor layers having different compositions, forming a dummy gate structure across the fin structure, forming gate spacers on opposite sidewalls of the dummy gate structure, respectively, removing the dummy gate structure to form a gate trench between the gate spacers, removing portions of the first semiconductor layers in the gate trench, such that the second semiconductor layers are suspended in the gate trench to serve as nanosheets, forming a first titanium nitride layer wrapping around the nanosheets, wherein an atomic ratio of titanium to nitrogen of the first titanium nitride layer is less than 1, and forming a metal fill layer over the first titanium nitride layer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Yi Lee, Kuan-Yu Wang, Cheng-Lung Hung, Chi-On Chui
  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20230317498
    Abstract: A light-emitting element panel, including a temporary storage substrate, an auxiliary pattern layer, multiple adhesive patterns, and multiple light-emitting elements, is provided. The auxiliary pattern layer is disposed on the temporary storage substrate and has multiple openings. The adhesive patterns are respectively disposed in the openings of the auxiliary pattern layer. The light-emitting elements are respectively disposed on the adhesive patterns. A reaction rate of the auxiliary pattern layer to a laser is lower than a reaction rate of the adhesive pattern to the laser. Moreover, another light-emitting element panel is also provided.
    Type: Application
    Filed: December 28, 2022
    Publication date: October 5, 2023
    Applicant: AUO Corporation
    Inventors: Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang, Chia-Hui Pai
  • Publication number: 20230261148
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 11658269
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 23, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20230080552
    Abstract: An organic light-emitting diode (OLED) display may have an array of pixels that each have OLED layers interposed between a cathode and an anode. The display may also include a planarization layer that is deposited using inkjet printing. To mitigate the need for dam structures to prevent overflow of the planarization layer during inkjet printing, capillary-flow-inducing structures may be included in the inactive area of the display. The topology of the capillary-flow-inducing structures may be propagated to a passivation layer such that an upper surface of the passivation layer has a similar topology as the capillary-flow-inducing structures. The planarization layer therefore undergoes capillary flow when deposited on the upper surface of the passivation layer. The capillary-flow-inducing structures may be formed from dots, rectangular strips, or trapezoidal strips. The capillary-flow-inducing structures may be formed from the same material as spacers in the active area or using another layer in the display.
    Type: Application
    Filed: May 27, 2022
    Publication date: March 16, 2023
    Inventors: Kuan-Yi Lee, Takahide Ishii, Prashant Mandlik, Chih-Lei Chen, Bhadrinarayana Lalgudi Visweswaran, Ankit Mahajan
  • Publication number: 20220359249
    Abstract: A device of mass transferring chips includes a first substrate, which includes a first surface with a chip-connecting area configured to attach a chip, a second surface opposite to the first surface, and a patterned recess. The patterned recess is disposed on the first surface or the second surface. A projection of at least a portion of the patterned recess on the first surface is spaced apart from the chip-connecting area. The device further includes a second substrate with a third surface. The third surface has a chip-receiving area configured to attach the chip from the first substrate.
    Type: Application
    Filed: September 22, 2021
    Publication date: November 10, 2022
    Inventors: Wei-Chieh CHEN, Kuan-Yi LEE, Wen-Hsien TSENG
  • Publication number: 20210286209
    Abstract: A display device includes a substrate, multiple spacers, multiple conductive particles, and a colloid layer. The spacers are disposed on the substrate. Each spacer has a first end closer to the substrate and a second end farther from the substrate, in which a width of the spacer is tapered from the first end to the second end. The conductive particles are disposed between the spacers. The colloid layer is disposed on the conductive particles and the spacers. A mother board is also disclosed.
    Type: Application
    Filed: October 8, 2020
    Publication date: September 16, 2021
    Inventors: Chih-Wen LU, Yun-Ru CHENG, Kuan-Yi LEE
  • Publication number: 20210210659
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 8, 2021
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 10985295
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: April 20, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20200295233
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 10680138
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: June 9, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20190245116
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 10297723
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: May 21, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Patent number: 10275205
    Abstract: A smart effects unit disclosed includes effects modules, a control module and a switching device. The control module includes a processor, a user interface and a memory. The processor is connected to an musical instrument and effect modules through an input switch interface, such that the audio signal of the instrument is able to be inputted into the effects modules based on a combination configuration to generate a combined effect audio signal. The combination configuration defines the connection sequence of the plurality of effect modules. The user interface is provided to adjust each effect module and the connection sequence order of effect modules through the input interface to generate the combination configuration, which is stored in a memory. The switching device connected to the control module is provided to switch the control module between different combination configurations based on the combination configurations stored in the memory.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: April 30, 2019
    Assignee: TRI-IN, INC.
    Inventors: Chia-Hung Fang, Li-Wen Chang, Kuan-Yi Lee
  • Patent number: 10276438
    Abstract: A marked pixel unit includes at least one active element, a first dielectric layer, a color filter unit, a second dielectric layer, and at least one pixel electrode. The active element includes a source, a gate, and a drain. The first dielectric layer is configured to cover the gate. The color filter unit is disposed above the first dielectric layer, and has an alignment opening. The second dielectric layer is disposed above the active element and the color filter unit, and has a contact hole. The pixel electrode is disposed above the second dielectric layer, and electrically connected to the drain through the contact hole. The contact hole of the second dielectric layer is located outside the alignment opening.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: April 30, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Hsin-Ju Wu, Yh-Hung Lee, You-Yuan Hu, Teng-Yi Wang, Wei-Chieh Chen, Kuan-Yi Lee, Kuan-Hsien Wu, Chih-chun Yang
  • Patent number: 10199544
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: February 5, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20180233631
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Application
    Filed: April 9, 2018
    Publication date: August 16, 2018
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: D835725
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: December 11, 2018
    Inventor: Kuan Yi Lee
  • Patent number: D890266
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 14, 2020
    Inventors: Kuan-Yi Lee, Chen-Hsuan Lee, Chen-Kai Lee