Patents by Inventor Kuang-Peng Lin

Kuang-Peng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190074314
    Abstract: An image sensor package includes a medium layer having a first surface and a second surface opposite to the first surface. The image sensor package also includes a metal-insulator-metal structure disposed on the first surface of the medium layer. The metal-insulator-metal structure includes a first metal layer, a first insulating layer, and a second metal layer, and the first insulating layer is disposed between the first metal layer and the second metal layer. The image sensor package further includes an optical filter disposed on the second surface of the medium layer.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 7, 2019
    Inventors: Wu-Cheng KUO, Kuo-Feng LIN, Tsung-Lin WU, Yu-Jen CHEN, Chin-Chuan HSIEH, Kuang-Peng LIN
  • Patent number: 10224357
    Abstract: An image sensor package includes a medium layer having a first surface and a second surface opposite to the first surface. The image sensor package also includes a metal-insulator-metal structure disposed on the first surface of the medium layer. The metal-insulator-metal structure includes a first metal layer, a first insulating layer, and a second metal layer, and the first insulating layer is disposed between the first metal layer and the second metal layer. The image sensor package further includes an optical filter disposed on the second surface of the medium layer.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: March 5, 2019
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Wu-Cheng Kuo, Kuo-Feng Lin, Tsung-Lin Wu, Yu-Jen Chen, Chin-Chuan Hsieh, Kuang-Peng Lin
  • Patent number: 9304564
    Abstract: A computer system and a power management method thereof are disclosed. The computer system comprises a smart charger and an embedded controller (EC). The smart charger has a voltage turbo boost (VTB) function. The EC enables or disables the VTB function to protect a battery from damage according to a current remaining capacity and a battery decline ratio of the battery.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: April 5, 2016
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chun-Jie Yu, Yu-Hui Chen, Kuang-Peng Lin
  • Publication number: 20150293569
    Abstract: A computer system and a power management method thereof are disclosed. The computer system comprises a smart charger and an embedded controller (EC). The smart charger has a voltage turbo boost (VTB) function. The EC enables or disables the VTB function to protect a battery from damage according to a current remaining capacity and a battery decline ratio of the battery.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 15, 2015
    Applicant: QUANTA COMPUTER INC.
    Inventors: Chun-Jie YU, Yu-Hui CHEN, Kuang-Peng LIN
  • Patent number: 6682659
    Abstract: A method for passivating a target layer. There is first provided a substrate. There is then formed over the substrate a target layer, where the target layer is susceptible to corrosion incident to contact with a corrosive material employed for further processing of the substrate. There is then treated, while employing a first plasma method employing a first plasma gas composition comprising an oxidizing gas, the target layer to form an oxidized target layer having an inhibited susceptibility to corrosion incident to contact with the corrosive material employed for further processing of the substrate. Finally, there is then processed further, while employing the corrosive material, the substrate. The method is useful when forming bond pads within microelectronic fabrications.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: January 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ching-Wen Cho, Kuwi-Jen Chang, Sen-Fu Chen, Kuang-Peng Lin, Shing-Jzy Tay, Szu-Hung Yang, Chai-Der Chang, Kuo-Su Huang, Jen-Shiang Leu, Weng-Liang Fang, Jyh-Ping Wang, Jow-Feng Lee
  • Patent number: 6531266
    Abstract: A process for reworking a non-reflowed, defective microlens element shape, of an image sensor device, without damage to an underlying spacer layer, or to underlying color filter elements, has been developed. The non-reflowed, microlens element shape, if defective and needing rework, is first subjected to a high energy exposure, converting the non-reflowed, microlens element shape to a acid type, microlens shape, then removed using a base type developer solution. Prior to formation of a reworked microlens element shape a baking cycle is employed to freeze, or render inactive, any organic residue still remaining on the surface of the spacer layer, after the base type developer removal procedure. Formation of the reworked, microlens element shape, followed by an anneal cycle, results in the desired rounded, microlens element, on the underlying spacer layer.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: March 11, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chih-Kung Chang, Kuang-Peng Lin, Yu-Kung Hsiao, Fu-Tien Weng, Bii-Junq Chang, Kuo-Liang Lu
  • Patent number: 6486054
    Abstract: The present invention teaches how greater solder ball height can be achieved without the need to sacrifice areal density. The mold in which the solder is formed, is created in two steps. In a first exposure, a negative photoresist (preferably DFR) is patterned to form a conventional cylindrical mold. However, exposure and development time are adjusted in such a way that a layer of unexposed and undeveloped resist of reduced thickness remains covering the floor of the mold. This residual resist layer is given a second exposure and, after development, forms an annular insert in the bottom of the first mold. After the mold has been filled with solder (either through electroplating or by using solder paste) it is removed, the result being a solder bump made up of two contiguous coaxial cylinders the upper one having the larger diameter. After remelt, bumps having this shape form oblate spheroids rather than spheres.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: November 26, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yang-Tung Fan, Hsiu-Mei Yu, Li-Hsin Tseng, Kuang-Peng Lin, Ta-Yang Lin
  • Patent number: 6472235
    Abstract: A method and an apparatus for preparing a backside-ground wafer for testing are described. The method includes the steps of first providing a calibration wafer that has a pattern formed on a top surface of an insulating material such as oxide or nitride. Three droplets of water are applied with each droplet sufficiently apart from the other droplets on the top surface of the calibration wafer. A backside-ground wafer that has a ground backside and a front side to be tested is then mated to the calibration wafer by mating the ground backside to the top surface of the calibration wafer with water droplets therein-between forming a bond by capillary reaction in-between the oxide pattern on the calibration wafer. The apparatus for mounting a backside-ground wafer to a calibration wafer consists of a slanted block having a top surface with a slant angle between about 10° and about 30°.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: October 29, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kuang-Peng Lin, Hung-Jen Tsai, Hsien-Tsong Liu