Patents by Inventor Kuang Yang

Kuang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240183082
    Abstract: A method for manufacturing an elastic fiber and the elastic fiber are provided. The method includes: providing a thermoplastic polyester elastomer; drying the thermoplastic polyester elastomer; melting the thermoplastic polyester elastomer by an extruder to form a melt; extruding the melt by a spinneret plate to form a plurality of filamentous streams; feeding the filamentous streams into a spinning channel for cooling and curing to form a plurality of monofilaments; and bundling and oiling the monofilaments by an oil wheel, after extending and guiding the monofilaments by a first godet roller and a second godet roller, and winding the monofilaments by a winder to obtain a thermoplastic polyester elastic fiber.
    Type: Application
    Filed: October 27, 2023
    Publication date: June 6, 2024
    Inventors: CHIH-YI LIN, KUO-KUANG CHENG, LI-YUAN CHEN, CHI-WEI CHANG, CHIA-CHUN YANG
  • Publication number: 20240184615
    Abstract: An electronic device capable of performing multi-camera intelligent switching and a multi-camera intelligent switching method thereof are provided. The electronic device includes a plurality of camera device media foundation transform (camara DMFT) units, an integrated DMFT unit and a mix camera agent. Each of the camera DMFT units is connected to one of a plurality of cameras. The integrated DMFT unit is serially connected to one of the camera DMFT units. The mix camera agent is connected to the cameras. The mix camera agent is used for obtaining a switching notification signal. The integrated DMFT unit switches a serial path between the integrated DMFT unit and one of the camera DMFT units according to the switching notification signal.
    Type: Application
    Filed: November 30, 2023
    Publication date: June 6, 2024
    Applicant: Acer Incorporated
    Inventors: Sheng-Hsin FAN, Chao-Kuang YANG, Liang-Chi CHEN
  • Publication number: 20240186752
    Abstract: An electrical connector includes: a first housing defining a front face and a rear face and two holes running through the front face and the rear face; a pair of terminals received in the holes respectively and extending forward but behind the front face of the first housing; and a first shielding tube fitly surrounding the first housing; wherein the first shielding tube defines a front distal portion located in front of the front face of the first housing, and the front distal portion shrinks gradually and becomes smaller in diameter.
    Type: Application
    Filed: May 12, 2023
    Publication date: June 6, 2024
    Inventors: Xia ZHAO, Jian-Kuang Zhu, Xiao-Gao Yang
  • Publication number: 20240185592
    Abstract: In one embodiment, an apparatus comprises a processor to: identify a workload comprising a plurality of tasks; generate a workload graph based on the workload, wherein the workload graph comprises information associated with the plurality of tasks; identify a device connectivity graph, wherein the device connectivity graph comprises device connectivity information associated with a plurality of processing devices; identify a privacy policy associated with the workload; identify privacy level information associated with the plurality of processing devices; identify a privacy constraint based on the privacy policy and the privacy level information; and determine a workload schedule, wherein the workload schedule comprises a mapping of the workload onto the plurality of processing devices, and wherein the workload schedule is determined based on the privacy constraint, the workload graph, and the device connectivity graph.
    Type: Application
    Filed: October 27, 2023
    Publication date: June 6, 2024
    Applicant: Intel Corporation
    Inventors: Shao-Wen Yang, Yen-Kuang Chen, Addicam V. Sanjay
  • Publication number: 20240177263
    Abstract: A graphics processing device is provided in the invention. The graphics processing device includes a storage device, a processing circuit and a calculation circuit. The storage device stores a plurality of applications. The processing circuit is coupled to the storage device and configured to install and execute the applications. The calculation circuit is coupled to the storage device and the processing circuit. When one of the applications is installed in the storage device by the processing circuit, the calculation circuit determines whether to deploy a graphics application interface (Graphics API) for the application. When the calculation circuit determines that the Graphics API needs to be deployed for the application, the calculation circuit determines whether to transform the first Graphics API corresponding to the application into a second Graphics API supporting multi-thread operations.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Kuan-Ju CHEN, Chao-Kuang YANG
  • Patent number: 11995471
    Abstract: A resource integration method includes the following steps: a receiving module receives access information from a guest operating system on the host device; the access information is used to determine whether the frame rate is lower than a frame rate threshold; when the receiving module determines that the frame rate is lower than the frame rate threshold, the receiving module transmits an external resource request signal to the receiving module; after the receiving module receives the external resource request signal, a resource management module (which is located in the bridge module) selects an optimal external device from a specific category (among a plurality of categories in a candidate list), and a calculation operation or a storage operation corresponding to the specific category is transmitted to the optimal external device for calculation or storage by the bridge module.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 28, 2024
    Assignee: ACER INCORPORATED
    Inventors: Kuan-Ju Chen, Wen-Cheng Hsu, Hung-Ming Chang, Chih-Wen Huang, Chao-Kuang Yang
  • Publication number: 20240128343
    Abstract: A manufacturing method of a split gate trench device includes forming an epitaxial layer on a substrate, and forming a trench in the epitaxial layer, wherein the trench is divided into a first part and a second part above the first part. A shielding gate and a shielding oxide layer are then formed in the first part, wherein the shielding oxide layer is located between the shielding gate and the trench and exposes the second part. The second part is filled with an oxide, two grooves having a contour that is wide at the top and narrow at the bottom are then formed in the oxide, and a part of a sidewall of the trench is exposed. A gate oxide layer is formed on an exposed surface of the sidewall, and a first top gate and a second top gate are then formed in each of the two grooves.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 18, 2024
    Applicant: Excelliance MOS Corporation
    Inventors: Chu-Kuang Liu, Hung-Kun Yang
  • Publication number: 20240128344
    Abstract: A split gate trench device, including a substrate, an epitaxial layer having a trench, and a split gate structure, is provided. The epitaxial layer is formed on the substrate, and the split gate structure is disposed in the trench. The split gate structure includes a shielding gate, two top gates, a shielding oxide layer, a gate oxide layer, and an inter-gate oxide layer. Each of the two top gates has a shape that is wide at the top and narrow at the bottom.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 18, 2024
    Applicant: Excelliance MOS Corporation
    Inventors: Chu-Kuang Liu, Hung-Kun Yang
  • Publication number: 20240124241
    Abstract: A transporting device can transport at least one product, the transporting device includes a mounting frame, a driving mechanism, a transmitting mechanism including a plurality of bent portions, a plurality of guiding mechanisms, and a supporting mechanism. Each guiding mechanism includes a rotating wheel and a guiding plate. Each bent portion is connected to the rotating wheel. The guiding plate is connected to the rotating wheel. The supporting mechanism can support the product. The driving mechanism is further connected to the rotating wheel and can drive the transmitting mechanism to rotate to drive the supporting mechanism to move. The driving mechanism is further connected to the guiding plate, the guiding plate and the rotating wheel can synchronously rotate to drive the supporting mechanism to pass through the bent portions. The present disclosure further provides a heating device.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Huan ZHANG, Qi KUANG, Hua WAN, Yi LIU, Wei-Wei WU, Jing-Chao YANG, Wen-Jin XIA
  • Patent number: 11962743
    Abstract: A 3D display system and a 3D display method are provided. The 3D display system includes a 3D display, a memory, and a processor. The processor is coupled to the 3D display and the memory and is configured to execute the following steps. As a first type application program is executed, an image content of the first type application program is captured, and a stereo format image is generated according to the image content of the first type application program. The stereo format image is delivered to a runtime complying with a specific development standard through an application program interface complying with the specific development standard. A display frame processing associated with the 3D display is performed on the stereo format image through the runtime, and a 3D display image content generated by the display frame processing is provided to the 3D display for displaying.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: April 16, 2024
    Assignee: Acer Incorporated
    Inventors: Shih-Hao Lin, Chao-Kuang Yang, Wen-Cheng Hsu, Hsi Lin, Chih-Wen Huang
  • Publication number: 20240098183
    Abstract: A marking method on image combined with sound signal, a terminal apparatus, and a server are provided. In the method, a first image is displayed. A selection command is detected. A target sound signal is embedded into a speech signal so as to generate a combined sound signal. The combined sound signal is transmitted. The selection command corresponds to a target region in the first image, and the selection command is generated selecting the target region through an input operation. The target sound signal corresponds to the target region of the selection command, and the speech signal is obtained by receiving sound. Accordingly, all attendants in the video conference are able to make makings on a shared screen.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 21, 2024
    Applicant: Acer Incorporated
    Inventors: Po-Jen Tu, Ming-Chun Fang, Jia-Ren Chang, Kai-Meng Tzeng, Chao-Kuang Yang
  • Publication number: 20240088246
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Publication number: 20240087988
    Abstract: The present disclosure, in some embodiments, relates an integrated chip. The integrated chip includes a substrate. A through-substrate-via (TSV) extends through the substrate. A dielectric liner separates the TSV from the substrate. The dielectric liner is along one or more sidewalls of the substrate. The TSV includes a horizontally extending surface and a protrusion extending outward from the horizontally extending surface. The TSV has a maximum width along the horizontally extending surface.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Hung-Ling Shih, Wei Chuang Wu, Shih Kuang Yang, Hsing-Chih Lin, Jen-Cheng Liu
  • Publication number: 20240075345
    Abstract: a resistance adjustable power generator having: an operating unit that receives commands of a user and is able to switch the resistance adjustable power generator to either a release mode or a resistance mode; a resistance generating unit that receive the commands from the operating unit and provides adjustable multiple levels of resistance to a connecting device, with the resistance generating unit having a resistance controlling center, multiple resistance generator, and an output controlling center; and a battery electrically connects to the resistance generating unit.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 7, 2024
    Inventors: Chia Yu Lo, Kuang-Yang Liao
  • Patent number: 11920055
    Abstract: A process for producing a barrier composition includes subjecting a siloxane compound having 1 to 3 amino groups and an aqueous solution including water and an alcohol to hydrolysis and first-stage condensation under required conditions, subjecting a first colloidal mixture obtained and an additional alcohol to second-stage condensation, subjecting a second colloidal mixture obtained, which has a particular solid content, to heating under required conditions, and subjecting a cured product obtained to aging under required conditions. A barrier composition produced by the process is also disclosed.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 5, 2024
    Assignee: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: Chung-Kuang Yang, Yi-Hsuan Lai, Sheng-Tung Huang, Kun-Li Wang
  • Publication number: 20240020082
    Abstract: An electronic device including a working screen, a sharing screen and a processor is provided. The processor is electrically connected to the working screen and the sharing screen and is configured to: create a virtual desktop of the working screen; assign the virtual desktop to the sharing screen; executes an application; and share the virtual desktop containing a window frame of the application to a remote computer device or share the window frame itself to the remote computer device.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 18, 2024
    Applicant: Acer Incorporated
    Inventors: Kuan-Ju CHEN, Hung-Ming CHANG, Chao-Kuang YANG
  • Patent number: 11869951
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Patent number: 11862535
    Abstract: The present disclosure relates an integrated chip. The integrated chip includes a semiconductor device arranged along a first side of a semiconductor substrate. The semiconductor substrate has one or more sidewalls extending from the first side of the semiconductor substrate to an opposing second side of the semiconductor substrate. A dielectric liner lines the one or more sidewalls of the semiconductor substrate. A through-substrate-via (TSV) is arranged between the one or more sidewalls and is separated from the semiconductor substrate by the dielectric liner. The TSV has a first width at a first distance from the second side and a second width at a second distance from the second side. The first width is smaller than the second width and the first distance is smaller than the second distance.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Ling Shih, Wei Chuang Wu, Shih Kuang Yang, Hsing-Chih Lin, Jen-Cheng Liu
  • Publication number: 20230412045
    Abstract: A speed-reducer-and-motor all-on-one machine is disclosed and includes a connection shaft, a motor and a speed reducer. The connection shaft includes a first section, a second section and an accommodation space. The first section and the second section are arranged in an axial direction. The accommodation space is in communication between a front end and a rear end of the connection shaft. An elliptical cam is formed on an outer surface of the second section of the connection shaft. An outer diameter of the first section is greater than a major axis length of the elliptical cam. The motor is received within the accommodation space and connected to an inner surface of the first section. The speed reducer is connected to the outer surface of the second section.
    Type: Application
    Filed: April 19, 2023
    Publication date: December 21, 2023
    Inventors: Chi-Wen Chung, Hung-Wei Lin, Fu-Kuang Yang, Shu-Hsiang Yang, Tzu-Min Yi
  • Patent number: 11836875
    Abstract: An augmented reality screen system includes an augmented reality device and a host. The augmented reality device is configured to take a physical mark through a camera. The host is configured to receive the physical mark, determine position information and rotation information of the physical mark, and fetch a virtual image from a storage device through a processor of the host. The processor transmits an adjusted virtual image to the augmented reality device according to the position information and the rotation information, and the augmentation device projects the adjusted virtual image to a display of the augmented reality device. The adjusted virtual image becomes a virtual extended screen, and the virtual extended screen and the physical mark are simultaneously displayed on the display of the augmented reality device.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: December 5, 2023
    Assignee: ACER INCORPORATED
    Inventors: Huei-Ping Tzeng, Chao-Kuang Yang, Wen-Cheng Hsu, Chih-Wen Huang, Chih-Haw Tan