Patents by Inventor Kuey-Yeou Tsao

Kuey-Yeou Tsao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4752815
    Abstract: A method of fabricating a Schottky barrier MOSFET wherein a polysilicon gate chip is disposed adjacent the drain and source regions of a single crystal silicon substrate surface, and a metal is deposited on the top surface of the gate chip and the drain and source regions of the substrate surface by direct reaction of the silicon of the surfaces with a compound of a tungsten or molybdenum. Preferably, the sidewalls of the gate chip are masked during the deposition of metal to avoid the formation of a metal bridge between the gate and drain or the gate and source.
    Type: Grant
    Filed: January 2, 1986
    Date of Patent: June 21, 1988
    Assignee: Gould Inc.
    Inventor: Kuey-Yeou Tsao
  • Patent number: 4587710
    Abstract: A method of fabricating a Schottky barrier MOSFET wherein a polysilicon gate chip is disposed adjacent the drain and source regions of a single crystal silicon substrate surface, and a metal is deposited on the top surface of the gate chip and the drain and source regions of the substrate surface by direct reaction of the silicon of the surfaces with a compound of a tungsten or molybdenum. Preferably, the sidewalls of the gate chip are masked during the deposition of metal to avoid the formation of a metal bridge between the gate and drain or the gate and source.
    Type: Grant
    Filed: June 15, 1984
    Date of Patent: May 13, 1986
    Assignee: Gould Inc.
    Inventor: Kuey-Yeou Tsao
  • Patent number: 4540607
    Abstract: A method is described for treating the surface of a field-effect transistor or a Schottky barrier diode. A polysilicon surface of a gate region of an FET or a single crystalline silicon surface of a Schottky barrier diode may be treated with a low-power argon-plasma for a relatively short period of time to enhance nucleation sites on the surface of the polysilicon or single crystalline silicon. A layer of tungsten or molybdenum may be selectively deposited on the surface of the polysilicon or single crystalline silicon by chemical-vapor deposition through silicon reduction of tungsten hexafluoride or molybdenum hexafluoride.
    Type: Grant
    Filed: August 8, 1983
    Date of Patent: September 10, 1985
    Assignee: Gould, Inc.
    Inventor: Kuey-Yeou Tsao
  • Patent number: 4508613
    Abstract: A chemically sensitive device for monitoring chemical properties is described. The device includes a depletion-mode field-effect transistor. Two electrical leads are connected between source and drain region of the field-effect transistor to monitor changes in current or potential resulting from changes in the amount of chemical to be monitored. A reference electrode is attached to a lower substrate surface of the field-effect transistor and electrically connected to the source via a highly doped region adjacent to the source and another highly doped region adjacent to the reference electrode, both having a polarity identical to the substrate. A sensing membrane which is specific to the chemical to be monitored is located on a portion of the substrate remote from the gate region but electrically connected to the gate region to alter conductance between the source and the drain in accordance with the presence or absence of the chemical to be monitored.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: April 2, 1985
    Assignee: Gould Inc.
    Inventors: Heinz H. Busta, Kuey-Yeou Tsao, Wayne D. White, Peter V. Loeppert