Patents by Inventor Kumiko Toshimori
Kumiko Toshimori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10609005Abstract: A method includes using a direct memory access controller, transferring first data from a memory to an input/output control circuit via a first bus and transferring the first data from the input/output control circuit to an authentication processing circuit via a second bus, without using the first bus. The method includes using the authentication processing circuit, generating authentication data based on the first data and transferring the first data from the input/output control circuit to a cryptography processing circuit via a third bus, without using the first bus. Responsive to authentication of the first data by a first CPU coupled to the first bus, the method includes using the cryptography processing circuit, decrypting the first data, and using the direct memory access controller, transferring the decrypted first data from the input/output control circuit to the memory via the first bus.Type: GrantFiled: February 15, 2018Date of Patent: March 31, 2020Assignee: Cypress Semiconductor CorporationInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Mikami
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Publication number: 20180295111Abstract: A method includes using a direct memory access controller, transferring first data from a memory to an input/output control circuit via a first bus and transferring the first data from the input/output control circuit to an authentication processing circuit via a second bus, without using the first bus. The method includes using the authentication processing circuit, generating authentication data based on the first data and transferring the first data from the input/output control circuit to a cryptography processing circuit via a third bus, without using the first bus. Responsive to authentication of the first data by a first CPU coupled to the first bus, the method includes using the cryptography processing circuit, decrypting the first data, and using the direct memory access controller, transferring the decrypted first data from the input/output control circuit to the memory via the first bus.Type: ApplicationFiled: February 15, 2018Publication date: October 11, 2018Applicant: Cypress Semiconductor CorporationInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko MIKAMI
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Patent number: 9942207Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.Type: GrantFiled: June 13, 2016Date of Patent: April 10, 2018Assignee: Cypress Semiconductor CorporationInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Mikami
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Publication number: 20160366114Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.Type: ApplicationFiled: June 13, 2016Publication date: December 15, 2016Inventors: Kenichi Iizuka, Kumiko Toshimori, Machiko MIKAMI
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Patent number: 9378165Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.Type: GrantFiled: June 5, 2014Date of Patent: June 28, 2016Assignee: Cypress Semiconductor CorporationInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Mikami
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Publication number: 20140289443Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.Type: ApplicationFiled: June 5, 2014Publication date: September 25, 2014Applicant: Spansion LLCInventors: Kenichi IIZUKA, Kumiko TOSHIMORI, Machiko MIKAMI
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Patent number: 8832460Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.Type: GrantFiled: October 16, 2009Date of Patent: September 9, 2014Assignee: Spansion LLCInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Soejima
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Publication number: 20100268963Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.Type: ApplicationFiled: October 16, 2009Publication date: October 21, 2010Applicant: FUJITSU LIMITEDInventors: Kenichi IIZUKA, Kumiko Toshimori, Machiko Soejima
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Publication number: 20040193763Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.Type: ApplicationFiled: March 2, 2004Publication date: September 30, 2004Applicant: FUJITSU LIMITEDInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Soejima