Abstract: A display device includes a base layer, a touch sensing layer, a light guide module and a display panel. The touch sensing layer is disposed on the base layer. The light guide module is disposed on the touch sensing layer. The touch sensing layer is located between the light guide module and the display panel, and the touch sensing layer and one of the light guide module and the display panel have no adhesive material therebetween.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: A sewing machine includes a main body and a quick release needle plate module. The main body includes a base seat having an inner frame, and an outer case that is mounted to the inner frame and that defines an accommodating compartment. The quick release needle plate module includes a catch member, and a needle plate that covers the accommodating compartment, that is detachably pivoted to a rear section of the inner frame, and that engages the catch member. The quick release needle plate module further includes a press member inserted through the outer case and the inner frame, and operable to push the catch member to disengage the catch member. The needle plate has a plate body that covers the accommodating compartment, and a resilient member mounted between the inner frame and the plate body for driving pivot action of the plate body away from the inner frame.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: A front light module includes a foldable light guide plate, a light source, an upper insulating layer, an upper optical adhesive layer, a lower insulating layer, and a lower optical adhesive layer. The top surface and the bottom surface of the foldable light guide plate adjoin the light incident surface of the foldable light guide plate. The light source faces toward the light incident surface. The upper insulating layer is located on the top surface. The upper optical adhesive layer is located on the upper insulating layer, and a storage modulus of the upper optical adhesive layer is less than a storage modulus of the upper insulating layer. The lower optical adhesive layer is located on a bottom surface of the lower insulating layer, and a storage modulus of the lower optical adhesive layer is less than a storage modulus of the lower insulating layer.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

Abstract: A front light module includes a foldable light guide plate, a light source, an upper insulating layer, an upper optical adhesive layer, a lower insulating layer, and a lower optical adhesive layer. The top surface and the bottom surface of the foldable light guide plate adjoin the light incident surface of the foldable light guide plate. The light source faces toward the light incident surface. The upper insulating layer is located on the top surface. The upper optical adhesive layer is located on the upper insulating layer, and a storage modulus of the upper optical adhesive layer is less than a storage modulus of the upper insulating layer. The lower optical adhesive layer is located on a bottom surface of the lower insulating layer, and a storage modulus of the lower optical adhesive layer is less than a storage modulus of the lower insulating layer.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a first gate structure on the first region, a second gate structure on the second region, and a third gate structure on the third region; forming an interlayer dielectric (ILD) layer around the first gate structure, the second gate structure, and the third gate structure; removing the first gate structure, the second gate structure, and the third gate structure to form a first recess, a second recess, and a third recess; forming a first interfacial layer in the first recess, the second recess, and the third recess; removing the first interfacial layer in the second recess; and forming a second interfacial layer in the second recess.

Abstract: The invention provides a semiconductor memory cell, the semiconductor memory cell includes a substrate having a first conductivity type, a doped region in the substrate, wherein the doped region has a second conductivity type, and the first conductivity type is complementary to the second conductivity type, a capacitor insulating layer and an upper electrode on the doped region, a transistor on the substrate, and a shallow trench isolation disposed between the transistor and the capacitor insulating layer, and the shallow trench isolation is disposed in the doped region.

Abstract: The invention provides a semiconductor memory cell, the semiconductor memory cell includes a substrate having a first conductivity type, a doped region in the substrate, wherein the doped region has a second conductivity type, and the first conductivity type is complementary to the second conductivity type, a capacitor insulating layer and an upper electrode on the doped region, a transistor on the substrate, and a shallow trench isolation disposed between the transistor and the capacitor insulating layer, and the shallow trench isolation is disposed in the doped region.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

Abstract: A one-time programmable (OTP) memory device includes a first memory cell, which further includes a first source line extending along a first direction on a substrate, a first word line extending along the first direction on one side of the first source line, a second word line extending along the first direction on another side of the first source line, a first diffusion region extending along a second direction adjacent to two sides of the first word line and the second word line, and a first metal interconnection connecting the first word line and the second word line.

Abstract: A display device includes a base layer, a touch sensing layer, a light guide module and a display panel. The touch sensing layer is disposed on the base layer. The light guide module is disposed on the touch sensing layer. The touch sensing layer is located between the light guide module and the display panel, and the touch sensing layer and one of the light guide module and the display panel have no adhesive material therebetween.

Abstract: The invention provides a light source module including a light guide plate and light emitting elements. The light guide plate includes a main plate body and a plurality of optical microstructures. The main plate body has a light emitting surface and a back surface opposite to each other, and a light incident surface connected therebetween. The optical microstructures are formed on the back surface. Each optical microstructure includes at least two sections connected to each other, each section having a reflective surface. The light emitting elements are disposed on the light incident surface, and light emitted by each of the light emitting elements is reflected by at least some of the reflective surfaces and transmitted to the light emitting surface. In any optical microstructure, the reflective surfaces are not parallel to each other.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a first gate structure on the first region, a second gate structure on the second region, and a third gate structure on the third region; forming an interlayer dielectric (ILD) layer around the first gate structure, the second gate structure, and the third gate structure; removing the first gate structure, the second gate structure, and the third gate structure to form a first recess, a second recess, and a third recess; forming a first interfacial layer in the first recess, the second recess, and the third recess; removing the first interfacial layer in the second recess; and forming a second interfacial layer in the second recess.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first gate structures, a plurality of second gate structures, a first strained region, and a second strained region. The substrate has a first region and a second region. The first gate structures are disposed in the first region on the substrate. The second gate structures are disposed in the second region on the substrate. The first strained region is formed in the substrate and has a first distance from an adjacent first gate structure. The second strained region is formed in the substrate and has a second distance from an adjacent second gate structure, wherein the second distance is greater than the first distance.

Abstract: The invention provides a light source module including a light guide plate and light emitting elements. The light guide plate includes a main plate body and a plurality of optical microstructures. The main plate body has a light emitting surface and a back surface opposite to each other, and a light incident surface connected therebetween. The optical microstructures are formed on the back surface. Each optical microstructure includes at least two sections connected to each other, each section having a reflective surface. The light emitting elements are disposed on the light incident surface, and light emitted by each of the light emitting elements is reflected by at least some of the reflective surfaces and transmitted to the light emitting surface. In any optical microstructure, the reflective surfaces are not parallel to each other.