Abstract: A semiconductor package includes an interconnect substrate, an insulating adhesive, a transient voltage suppressor (TVS) chip, at least one first conductive wire, and at least one second conductive wire. The interconnect substrate includes a bottom layer and a top layer, the bottom layer includes two first conductive blocks and a first insulating block therebetween, the top layer includes two second conductive blocks and a second insulating block therebetween, the second conductive blocks are respectively formed on the first conductive blocks, and the second insulating block is formed on the first insulating block. The insulating adhesive is formed on the second insulating block. The TVS chip is formed on the insulating adhesive without overlapping the second conductive blocks. The first conductive wire and the second conductive wire are respectively electrically connected to the second conductive blocks and electrically connected to the TVS chip.

Abstract: A transient voltage suppression device includes a lightly-doped semiconductor structure, a first doped well, a first heavily-doped area, a first buried area, and a second heavily-doped area. The lightly-doped semiconductor structure has a first conductivity type. The first doped well has a second conductivity type and is formed in the lightly-doped semiconductor structure. The first heavily-doped area has the second conductivity type and is formed in the first doped well. The first buried area has the first conductivity type and is formed in the lightly-doped semiconductor structure and under the first doped well, and the first buried area is adjacent to the first doped well. The second heavily-doped area has the second conductivity type and is formed in the lightly-doped semiconductor structure.

Abstract: A vertical transient voltage suppression device includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second heavily-doped area having the first conductivity type, and a diode. The first doped well is arranged in the semiconductor substrate and spaced from the bottom of the semiconductor substrate, and the first doped well is floating. The first heavily-doped area is arranged in the first doped well. The second heavily-doped area is arranged in the semiconductor substrate. The diode is arranged in the semiconductor substrate and electrically connected to the second heavily-doped area through a conductive trace.

Abstract: Glycosphingolipids (GSLs) bearing ?-glucose (?-Glc) that preferentially stimulate human invariant NKT (iNKT) cells are provided. GSLs with ?-glucose (?-Glc) that exhibit stronger induction in humans (but weaker in mice) of cytokines and chemokines and expansion and/or activation of immune cells than those with ?-galactose (?-Gal) are disclosed. GSLs bearing ?-glucose (?-Glc) and derivatives of ?-Glc with F at the 4 and/or 6 positions are provided. Methods for iNKT-independent induction of chemokines by the GSL with ?-Glc and derivatives thereof are disclosed. Methods for immune stimulation in humans using GSLs with ?-Glc and derivatives thereof are provided.

Abstract: A lateral transient voltage suppressor device is provided, comprising a doped substrate, a lateral clamping structure disposed on the doped substrate, a buried doped layer disposed between the doped substrate and the lateral clamping structure for isolation, at least one diode module, and at least one trench arranged in the doped substrate, having a depth not less than that of the buried doped layer, and being disposed between the lateral clamping structure and the at least one diode module for electrical isolation. The doped substrate and the buried doped layer have opposite conductivity types such that the doped substrate is electrically floating. The buried doped layer can be further disposed to separate the diode module from the doped substrate. By employing the proposed invention, the lateral transient voltage suppressor device is advantageous of maintaining both a lower clamping voltage as well as a reduced dynamic resistance.

Abstract: A method and an apparatus for establishing a coordinate system and a data structure product are provided. The method includes following steps: obtaining at least one layer related to an arrangement of an indoor space to generate a layout pattern in a 2D or 3D model; obtaining locations of positioning devices located within the indoor space and labelling the locations in the layout pattern; dividing the layout pattern into multiple view tiles according to a unit area or a unit volume for displaying the layout pattern; dividing a portion of the layout pattern around the labelled positioning devices into multiple positioning tiles according to the labelled locations of the positioning devices; and selecting at least one representative point of the view tiles and the positioning tiles as a reference point to define a reference frame and establishing the coordinate system based on the reference frame.

Abstract: A ticket authentication method and a ticket authentication device are provided. The ticket authentication method includes the following steps. A first electronic device outputs an e-ticket. A second electronic device acquires the e-ticket. The second electronic device outputs a visible light verification code. The first electronic device acquires the visible light verification code and generates a composite code according to a certification data and the verification code. The second electronic device acquires the visible light composite code, and determines whether the composite code matches the certification data and the verification code. When the composite code matches the certification data and the verification code, the second electronic determines that the authentication of the e-ticket is successful.

Abstract: A voucher verification auxiliary method is provided, including: when a user device is approaching a voucher verification auxiliary device, generating an encryption key for the user device to encrypt voucher data with the encryption key to generate first encrypted data; reading and decrypting the first encrypted data to obtain the voucher data; encrypting the voucher data to generate and transmit second encrypted data to a verification center; decrypting the second encrypted data to obtain the voucher data, generating a verification result after verifying the voucher data, encrypting the verification result to become third encrypted data, and transmitting the third encrypted data back to the voucher verification auxiliary device; decrypting the third encrypted data to obtain the verification result; transmitting the verification result to a voucher receiving terminal. A voucher verification auxiliary device and a voucher verification auxiliary system are also provided.

Abstract: A transient voltage suppression device with improved electrostatic discharge (ESD) robustness includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second doped well having the second conductivity type, a second heavily-doped area having the first conductivity type, and a first current blocking structure. The first doped well is arranged in the semiconductor substrate. The first heavily-doped area is arranged in the first doped well. The second doped well is arranged in the semiconductor substrate. The second heavily-doped area is arranged in the second doped well. The first current blocking structure is arranged in the semiconductor substrate, spaced from the bottom of the semiconductor substrate, and arranged between the first doped well and the second doped well.

Abstract: A transient voltage suppression device includes a lightly-doped semiconductor structure, a first doped well, a first heavily-doped area, a first buried area, and a second heavily-doped area. The lightly-doped semiconductor structure has a first conductivity type. The first doped well has a second conductivity type and is formed in the lightly-doped semiconductor structure. The first heavily-doped area has the second conductivity type and is formed in the first doped well. The first buried area has the first conductivity type and is formed in the lightly-doped semiconductor structure and under the first doped well, and the first buried area is adjacent to the first doped well. The second heavily-doped area has the second conductivity type and is formed in the lightly-doped semiconductor structure.

Abstract: A lateral transient voltage suppressor device is provided, comprising a doped substrate, a lateral clamping structure disposed on the doped substrate, a buried doped layer disposed between the doped substrate and the lateral clamping structure for isolation, at least one diode module, and at least one trench arranged in the doped substrate, having a depth not less than that of the buried doped layer, and being disposed between the lateral clamping structure and the at least one diode module for electrical isolation. The doped substrate and the buried doped layer have opposite conductivity types such that the doped substrate is electrically floating. The buried doped layer can be further disposed to separate the diode module from the doped substrate. By employing the proposed invention, the lateral transient voltage suppressor device is advantageous of maintaining both a lower clamping voltage as well as a reduced dynamic resistance.

Abstract: A vertical transient voltage suppression device includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second heavily-doped area having the first conductivity type, and a diode. The first doped well is arranged in the semiconductor substrate and spaced from the bottom of the semiconductor substrate, and the first doped well is floating. The first heavily-doped area is arranged in the first doped well. The second heavily-doped area is arranged in the semiconductor substrate. The diode is arranged in the semiconductor substrate and electrically connected to the second heavily-doped area through a conductive trace.

Abstract: A transient voltage suppression device with improved electrostatic discharge (ESD) robustness includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second doped well having the second conductivity type, a second heavily-doped area having the first conductivity type, and a first current blocking structure. The first doped well is arranged in the semiconductor substrate. The first heavily-doped area is arranged in the first doped well. The second doped well is arranged in the semiconductor substrate. The second heavily-doped area is arranged in the second doped well. The first current blocking structure is arranged in the semiconductor substrate, spaced from the bottom of the semiconductor substrate, and arranged between the first doped well and the second doped well.

Abstract: Glycosphingolipids (GSLs) compositions and methods for iNKT-independent induction of chemokines are disclosed.

Abstract: A system and method for combining light codes and a video are provided. The system includes an editing device and a storage device. The editing device identifies the content of a video to obtain a playback period of a plurality of frames having at least one candidate object in the video. The storage device stores at least one candidate object code and at least one light code symbol, and the light code symbol has a correspondence with the candidate object code. The editing device matches playback period of the frames having the at least one candidate object with the light code symbol, so as to provide a light code output table corresponding to the video.

Abstract: A bidirectional silicon-controlled rectifier includes a lightly-doped semiconductor structure, a first lightly-doped region, a second lightly-doped region, a first doped well, a second doped well, a first heavily-doped area, a second heavily-doped area, a third heavily-doped area, a fourth heavily-doped area. The lightly-doped semiconductor structure, the first heavily-doped area, and the third heavily-doped area have a first conductivity type. The first lightly-doped region, the second lightly-doped region, the first doped well, the second doped well, the fourth heavily-doped area, and the second heavily-doped area have a second conductivity type. A first part of the first lightly-doped region is arranged under the first doped well. A second part of the second lightly-doped region is arranged under the second doped well.

Abstract: An improved transient voltage suppression device includes a semiconductor substrate, a transient voltage suppressor, at least one first diode, at least one conductive pad, and at least one second diode. The transient voltage suppressor has an N-type heavily-doped clamping area. The first anode of the first diode is electrically connected to the N-type heavily-doped clamping area. The conductive pad is electrically connected to the first cathode of the first diode. The second anode of the second diode is electrically connected to the conductive pad and the second cathode of the second diode is electrically connected to the transient voltage suppressor. The first anode is closer to the N-type heavily-doped clamping area rather than the conductive pad. The conductive pad is closer to the N-type heavily-doped clamping area rather than the second anode.

Abstract: A method and an apparatus for establishing a coordinate system and a data structure product are provided. The method includes following steps: obtaining at least one layer related to an arrangement of an indoor space to generate a layout pattern in a 2D or 3D model; obtaining locations of positioning devices located within the indoor space and labelling the locations in the layout pattern; dividing the layout pattern into multiple view tiles according to a unit area or a unit volume for displaying the layout pattern; dividing a portion of the layout pattern around the labelled positioning devices into multiple positioning tiles according to the labelled locations of the positioning devices; and selecting at least one representative point of the view tiles and the positioning tiles as a reference point to define a reference frame and establishing the coordinate system based on the reference frame.

Abstract: Glycosphingolipids (GSLs) bearing ?-glucose (?-Glc) that preferentially stimulate human invariant NKT (iNKT) cells are provided. GSLs with ?-glucose (?-Glc) that exhibit stronger induction in humans (but weaker in mice) of cytokines and chemokines and expansion and/or activation of immune cells than those with ?-galactose (?-Gal) are disclosed. GSLs bearing ?-glucose (?-Glc) and derivatives of ?-Glc with F at the 4 and/or 6 positions are provided. Methods for iNKT-independent induction of chemokines by the GSL with ?-Glc and derivatives thereof are disclosed. Methods for immune stimulation in humans using GSLs with ?-Glc and derivatives thereof are provided.

Abstract: A system and method for combining light codes and a video are provided. The system includes an editing device and a storage device. The editing device identifies the content of a video to obtain a playback period of a plurality of frames having at least one candidate object in the video. The storage device stores at least one candidate object code and at least one light code symbol, and the light code symbol has a correspondence with the candidate object code. The editing device matches playback period of the frames having the at least one candidate object with the light code symbol, so as to provide a light code output table corresponding to the video.