Patents by Inventor Kun-tack Lee

Kun-tack Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100267225
    Abstract: A method of manufacturing a semiconductor device, the method including forming a photoresist film on a substrate, and removing the photoresist film from the substrate using a composition that includes a sulfuric acid solution, a hydrogen peroxide solution, and a corrosion inhibitor.
    Type: Application
    Filed: April 15, 2009
    Publication date: October 21, 2010
    Inventors: Hyo-san Lee, Bo-un Yoon, Kun-tack Lee, Dae-hyuk Kang, Jeong-nam Han, Jung-jae Myung, Hyung-pyo Hong, Hun-pyo Hong
  • Patent number: 7745338
    Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: June 29, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-hoon Cha, Chang-ki Hong, Kun-tack Lee, Woo-gwan Shim, Chang-sup Mun, Ho-wook Choi
  • Patent number: 7704828
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a mold for forming a storage electrode, forming sacrificial spacers at side walls of openings in the mold, forming a conductive film for a storage electrode along the inside of the openings, removing the mold by a wet etching process, removing the sacrificial spacers by a dry etching process, and sequentially forming a dielectric film and an upper electrode on the storage electrode.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Sung-Il Cho
  • Publication number: 20090280641
    Abstract: An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening.
    Type: Application
    Filed: May 7, 2009
    Publication date: November 12, 2009
    Inventors: Dae-Hyuk Kang, Young-Hoo Kim, Chang-Ki Hong, Kun-Tack Lee, Jae-Dong Lee, Dae-Hong Eom, Jeong-Nam Han
  • Publication number: 20090137126
    Abstract: A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.
    Type: Application
    Filed: November 25, 2008
    Publication date: May 28, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yu-Kyung Kim, Kun-Tack Lee, Woo-Gwan Shim, Chang-Ki Hong
  • Publication number: 20090117499
    Abstract: A cleaning solution for an immersion photolithography system according to example embodiments may include an ether-based solvent, an alcohol-based solvent, and a semi-aqueous-based solvent. In the immersion photolithography system, a plurality of wafers coated with photoresist films may be exposed pursuant to an immersion photolithography process using an immersion fluid. The area contacted by the immersion fluid during the exposure process may accumulate contaminants. Accordingly, the area contacted by the immersion fluid during the exposure process may be washed with the cleaning solution according to example embodiments so as to reduce or prevent defects in the immersion photolithography system.
    Type: Application
    Filed: September 19, 2008
    Publication date: May 7, 2009
    Inventors: Se-yeon Kim, Yong-kyun Ko, Sang-mi Lee, Yang-koo Lee, Hun-jung Yi, Kun-tack Lee
  • Patent number: 7498217
    Abstract: In a method of manufacturing a semiconductor device such as a SONOS type semiconductor device, a trench is formed on a substrate. An isolation layer protruding from the substrate is formed to fill the trench. After a first layer is formed on the substrate, a preliminary second layer pattern is formed on the first layer. The preliminary second layer pattern has an upper face substantially lower than or substantially equal to an upper face of the isolation layer. A third layer is formed on the preliminary second layer and the isolation layer. A fourth layer is formed on the third layer. The fourth layer, the third layer, the preliminary second layer pattern and the first layer are partially etched to form a gate structure on the substrate. Source/drain regions are formed at portions of the substrate adjacent to the gate structure.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: March 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Woo-Gwan Shim, Jong-Won Lee
  • Patent number: 7488688
    Abstract: A method for removing an oxide layer such as a natural oxide layer and a semiconductor manufacturing apparatus which uses the method to remove the oxide layer. A vertically movable susceptor is installed at the lower portion in a processing chamber and a silicon wafer is loaded onto the susceptor when it is at the lower portion of the processing chamber. The air is exhausted from the processing chamber to form a vacuum condition therein. A hydrogen gas in a plasma state and a fluorine-containing gas are supplied into the processing chamber to induce a chemical reaction with the oxide layer on the silicon wafer, resulting in a reaction layer. Then, the susceptor is moved up to the upper portion of the processing chamber, to anneal the silicon wafer on the susceptor with a heater installed at the upper portion of the processing chamber, thus vaporizing the reaction layer. The vaporized reaction layer is exhausted out of the chamber.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: February 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-pil Chung, Kyu-whan Chang, Sun-jung Lee, Kun-tack Lee, Im-soo Park, Kwang-wook Lee, Moon-hee Lee
  • Publication number: 20080188049
    Abstract: Methods of manufacturing non-volatile memory devices are provided including sequentially forming a tunnel insulating layer, a charge-trapping layer, a blocking layer and a conductive layer on a substrate having a channel region. The conductive layer is patterned to form a word line structure, and the blocking layer and the charge-trapping layer are etched using an aqueous acid solution as an etching solution to form a blocking layer pattern and a charge-trapping layer pattern.
    Type: Application
    Filed: January 30, 2008
    Publication date: August 7, 2008
    Inventors: Woo Gwan Shim, Mong-Sup Lee, Ji-Hoon Cha, Chang-Ki Hong, Kun-Tack Lee
  • Publication number: 20080138972
    Abstract: A method of removing a photoresist may include permeating supercritical carbon dioxide into the photoresist on a substrate having a conductive structure including a metal. The photoresist permeating the supercritical carbon dioxide may be easily removable. The photoresist permeating the supercritical carbon dioxide may be removed using a photoresist cleaning solution from the substrate. The photoresist cleaning solution may include an alkanolamine solution of about 8 percent by weight to about 20 percent by weight, a polar organic solution of about 25 percent by weight to about 40 percent by weight, a reducing agent of about 0.5 percent by weight to about 3 percent by weight with the remainder being water. The photoresist may be easily removed without damaging the conductive structure in a plasma process.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 12, 2008
    Inventors: Dae-Hyuk Kang, Hyo-San Lee, Dong-Gyun Han, Chang-Ki Hong, Kun-Tack Lee
  • Publication number: 20080047576
    Abstract: In a single-substrate type apparatus for processing a substrate, the apparatus includes a chamber, a bottom panel, a solution supplying part and a substrate holder. The chamber has an upper portion and a lower portion. The bottom panel is detachably connected to the lower portion. The solution supplying part is connected to the bottom panel to supply a processing solution to the substrate in the chamber. The substrate holder provides the substrate into the chamber, the substrate holder holding both side portions of the substrate such that the substrate is vertically arranged.
    Type: Application
    Filed: August 23, 2007
    Publication date: February 28, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Ok KIM, Chang-Ki HONG, Kun-Tack LEE, In-Gi KIM, Woo-Gwan SHIM, Jeong-Nam HAN, Kang-Youn LEE
  • Publication number: 20080044971
    Abstract: A method for fabricating a semiconductor device is disclosed. The method includes forming an etch stop layer on a substrate, forming a mold layer on the substrate, and forming an opening exposing the substrate by patterning the mold layer and the etch stop layer, wherein the opening includes a lower portion defined by the etch stop layer and a middle portion. The method further includes enlarging the lower portion by etching a side portion of the etch stop layer exposed by the opening using an etching solution including sulfuric acid and water; and forming a lower electrode on an inner surface of the opening including the enlarged lower portion, wherein, after enlarging the lower portion, a width of the lower portion is greater than a width of the middle portion.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO,. LTD.
    Inventors: Dae-Hyuk KANG, Chang-Ki HONG, Kun-Tack LEE, Im-Soo PARK, Dong-Gyun HAN, Mong-Sup LEE, Jung-Min OH
  • Publication number: 20080029159
    Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.
    Type: Application
    Filed: March 20, 2007
    Publication date: February 7, 2008
    Inventors: Hyo-san Lee, Chang-ki Hong, Kun-tack Lee, Jeong-nam Han
  • Publication number: 20080014752
    Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.
    Type: Application
    Filed: April 20, 2007
    Publication date: January 17, 2008
    Inventors: Ji-hoon Cha, Chang-ki Hong, Kun-tack Lee, Woo-gwan Shim, Chang-sup Mun, Ho-wook Choi
  • Publication number: 20070293054
    Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 20, 2007
    Inventors: Hyo-San Lee, Chang-Ki Hong, Kun-Tack Lee, Woo-Gwan Shim, Jeong-Nam Han
  • Publication number: 20070264793
    Abstract: In a method of manufacturing a semiconductor device such as a SONOS type semiconductor device, a trench is formed on a substrate. An isolation layer protruding from the substrate is formed to fill the trench. After a first layer is formed on the substrate, a preliminary second layer pattern is formed on the first layer. The preliminary second layer pattern has an upper face substantially lower than or substantially equal to an upper face of the isolation layer. A third layer is formed on the preliminary second layer and the isolation layer. A fourth layer is formed on the third layer. The fourth layer, the third layer, the preliminary second layer pattern and the first layer are partially etched to form a gate structure on the substrate. Source/drain regions are formed at portions of the substrate adjacent to the gate structure.
    Type: Application
    Filed: May 10, 2007
    Publication date: November 15, 2007
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Kun-Tack Lee, Dae-Hyuk Kang, Woo-Gwam Shim, Jong-Won Lee
  • Publication number: 20070254389
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a mold for forming a storage electrode, forming sacrificial spacers at side walls of openings in the mold, forming a conductive film for a storage electrode along the inside of the openings, removing the mold by a wet etching process, removing the sacrificial spacers by a dry etching process, and sequentially forming a dielectric film and an upper electrode on the storage electrode.
    Type: Application
    Filed: April 27, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Min OH, Jeong-Nam HAN, Chang-Ki HONG, Kun-Tack LEE, Dae-Hyuk KANG, Sung-Il CHO
  • Publication number: 20070243715
    Abstract: A cleaning solution selectively removes a titanium nitride layer and a non-reacting metal layer. The cleaning solution includes an acid solution and an oxidation agent with iodine. The cleaning solution also effectively removes a photoresist layer and organic materials. Moreover, the cleaning solution can be employed in tungsten gate electrode technologies that have been spotlighted because of the capability to improve device operation characteristics.
    Type: Application
    Filed: June 27, 2007
    Publication date: October 18, 2007
    Inventors: Sang-Yong Kim, Kun-Tack Lee
  • Patent number: 7265040
    Abstract: A cleaning solution selectively removes a titanium nitride layer and a non-reacting metal layer. The cleaning solution includes an acid solution and an oxidation agent with iodine. The cleaning solution also effectively removes a photoresist layer and organic materials. Moreover, the cleaning solution can be employed in tungsten gate electrode technologies that have been spotlighted because of the capability to improve device operation characteristics.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: September 4, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Yong Kim, Kun-Tack Lee
  • Patent number: 7237561
    Abstract: An apparatus for cleaning a semiconductor wafer and method for cleaning a wafer using the same wherein, the apparatus includes a chamber on which a wafer is mounted, a revolving chuck mounted in the chamber for supporting and fixing the wafer, a nozzle for spraying cleaning solution onto the wafer, a cover for covering an upper part of the chamber, and a light source. The cleaning solution, preferably one of ozone water, hydrogen water, or electrolytic-ionized water, may be heated for a short time and used to clean the wafer.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: July 3, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Im-soo Park, Kun-tack Lee, Yong-pil Han, Sang-rok Hah