Abstract: The present invention provides a high-aluminum austenitic alloy and a high-aluminum austenitic centrifugal casting pipe. The high-aluminum austenitic alloy and the high-aluminum austenitic centrifugal casting pipe have excellent anti-corrosion capabilities and creep resistance at a temperature of 900° C. or above, while having required mechanical properties. In weight percentage, the high-aluminum austenitic alloy or the high-aluminum austenitic centrifugal casting pipe of the present invention is composed of the elements of: C, 0.3-0.7%; Mn, 0-0.5%; Si, 0-0.5%; Cr, 20-26%; Ni, 40-50%; Al, 3.5-5%; Ti, 0.01-0.3%; Zr, 0.01-0.3%; Nb, 0.1-1%; Ta, 0.01-2%; Mo, 0.01-1%; W, 0.01-1.9%; N, 0.001-0.04%; Re, 0.03-0.3%; the remainder being Fe and inevitable impurities. The present invention also relates to a method for manufacturing the high-aluminum austenitic alloy and the high-aluminum austenitic centrifugal casting pipe of the present invention.

Abstract: A card edge connector includes an insulative housing defining a front face, a rear face, and a card slot opening forward through the front face, a row of first terminals retained in the insulative housing from the front face, a row of second terminals retained in the insulative housing from the rear face, and a grounding and shielding plate. The row of second terminals includes signal terminals and grounding terminals, each second terminal including an upright portion, an elastic portion extending from the upright portion with a contacting portion exposed upon the card slot, and a leg portion. The grounding and shielding plate covers the rear face of the insulative housing and electrical connects to all the grounding terminals of the row of second terminals.

Abstract: The present invention relates to an enteral sustained-release sugar alcohol additive including an inner layer structure and an outer layer structure. The inner layer structure contains components of xylitol and agar, and the outer layer structure contains components of carrageenan or gellan gum or xanthan gum or guar gum, vitamin B12, L-arabinose, and fermented bifidobacterium or fermented propionibacterium or fermented lactobacillus. The present invention further provides a method of preparing an enteral sustained-release sugar alcohol additive and an application thereof. In the present invention, by compounding xylitol, L-arabinose and vitamin B12, directional regulation of intestinal microorganisms can be achieved and high concentration synthesis of propionate in the intestine can be realized.

Abstract: A card edge connector includes an insulative housing defining a front face, a rear face, and a card slot opening forward through the front face, a row of first terminals retained in the insulative housing from the front face, a row of second terminals retained in the insulative housing from the rear face, and a grounding and shielding plate. The row of second terminals includes signal terminals and grounding terminals, each second terminal including an upright portion, an elastic portion extending from the upright portion with a contacting portion exposed upon the card slot, and a leg portion. The grounding and shielding plate covers the rear face of the insulative housing and electrical connects to all the grounding terminals of the row of second terminals.

Abstract: A charge pump generates a voltage higher than an intermediate voltage and a regulator circuit provides a first regulated voltage higher than the intermediate voltage. A second stage includes a regulator stage using the first voltage to provide the intermediate voltage from the first voltage. A charge pump provides a pump output voltage. The pump output voltage is divided and the divided voltage is presented to a first comparator that compares it with a reference voltage. The first comparator drives the gate of a first MOS transistor to regulate the pump output voltage to a regulated voltage related to the reference voltage. The regulated voltage is presented to a second comparator that compares it with the reference voltage. The second comparator drives the gate of a second MOS transistor to downconvert the regulated output voltage to an intermediate voltage related to the reference voltage.

Abstract: A first voltage divider includes a first resistor having a first resistance coupled to a positive voltage reference in series with a second resistor having a second resistance and coupled to ground. A second voltage divider includes a third resistor having the first resistance coupled to the positive voltage potential in series with a fourth resistor having the second resistance, and a fifth resistor having a third resistance and coupled to a negative voltage. A comparator has an inverting input coupled to the junction of the first and second resistors and a non-inverting input coupled to the junction of the third and fourth resistors. The first and third resistors are equal and the second and fourth resistors are equal. The fifth resistor has a value chosen to drop a voltage equal to the target voltage to be regulated when the voltage regulator output is equal to that target voltage.

Abstract: A signal integrity checking circuit for an integrated circuit detects whether signal condition involving loading of data into storage elements is valid or improper and flags the result. The integrity circuit includes a plurality of adjacently positioned and substantially similar storage elements, which are clocked by a common clock line and loaded from a common data input line. A common reset line may also be provided. The storage elements may be flip-flops, latches, RAM, etc. A logic gate, such as a NAND gate, receives the storage element outputs and flags improper loading of data. Inverters on the input and output sides of one storage element force it to the opposite state from the other storage element. The signal integrity checking circuit is valuable for ensuring proper loading during power-on or start-up, and at other times when loading of data may occur.

Abstract: A signal integrity checking circuit for an integrated circuit detects whether signal condition involving loading of data into storage elements is valid or improper and flags the result. The integrity circuit includes a plurality of adjacently positioned and substantially similar storage elements, which are clocked by a common clock line and loaded from a common data input line. A common reset line may also be provided. The storage elements may be flip-flops, latches, RAM, etc. A logic gate, such as a NAND gate, receives the storage element outputs and flags improper loading of data. Inverters on the input and output sides of one storage element force it to the opposite state from the other storage element. The signal integrity checking circuit is valuable for ensuring proper loading during power-on or start-up, and at other times when loading of data may occur.

Abstract: A switch controlling circuit for the testing and fine-tuning of integrated circuits comprising of a series of flip-flops chain together in a serial manner. The contents of the flip-flop are shift in from the input of the first flip-flop in the chain. The output of each flip-flop connects to individual switch whereby the states of the flip-flops control the state of the switches.