Patents by Inventor Kuniaki Okada

Kuniaki Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971641
    Abstract: An active matrix substrate includes a first TFT disposed in each of pixel regions, a first flattened layer covering the first TFT, and a pixel electrode provided on the first flattened layer. The first TFT includes a lower gate electrode, a lower gate insulating layer, an oxide semiconductor layer, an upper gate insulating layer, and an upper gate electrode. The active matrix substrate further includes a first connection electrode for electrically connecting a drain contact region of the oxide semiconductor layer and the pixel electrode. The first flattened layer includes a pixel contact hole formed so as to expose a part of the first connection electrode. The bottom face of the pixel contact hole at least partially overlaps, of a lower gate metal layer including a lower gate electrode and an upper gate metal layer including an upper gate electrode, at least the lower gate metal layer when viewed from the normal direction of the substrate.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 30, 2024
    Assignee: Sharp Display Technology Corporation
    Inventors: Atsushi Hachiya, Hiroaki Furukawa, Yuhichi Saitoh, Kuniaki Okada
  • Publication number: 20240103311
    Abstract: Provided are a liquid crystal panel which has good visibility and in which a decrease in the display quality is sufficiently suppressed, and a head mounted display and a liquid crystal display device using the same. The liquid crystal panel includes a liquid crystal layer, a spacer, and a light-shielding section between a first substrate a second substrate facing the first substrate. The light-shielding section includes column-direction light-shielding sections arranged in a column direction and shielding parts between the pixels aligned in a row direction from light, and row-direction light-shielding sections arranged in the row direction and shielding parts between the pixels aligned in the column direction from light. The row-direction light-shielding sections include one that includes a first light-shielding section including an arrangement region of the spacer and a second light-shielding section adjacent to the first light-shielding section in the column direction.
    Type: Application
    Filed: August 14, 2023
    Publication date: March 28, 2024
    Inventors: Seiichi UCHIDA, Kuniaki OKADA, Keisuke YOSHIDA
  • Publication number: 20240105731
    Abstract: An active matrix substrate includes a substrate and a plurality of pixels located on the substrate. Each of the pixels includes an oxide semiconductor layer, a first insulator covering the oxide semiconductor layer, a first contact hole located at the first insulator, a first extraction electrode located on the first insulator and in the first contact hole, and connected to the oxide semiconductor layer, a second insulator covering the first extraction electrode, a second contact hole located at the second insulator, a second extraction electrode located on the second insulator and in the second contact hole, and connected to the first extraction electrode, and a pixel electrode connected to the second extraction electrode. The first and second extraction electrodes are light-transmissive, and a portion of a side surface of at least one of the first and second contact holes is not covered with the first and second extraction electrodes.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 28, 2024
    Inventors: Kuniaki OKADA, Shinpei HIGASHIDA
  • Publication number: 20240087520
    Abstract: The present application discloses a display device capable of preventing a black display defect with a pixel circuit used therein in which P-type and N-type transistors are mixed. Provided is a pixel circuit including an organic EL element, a holding capacitor, a P-type drive transistor, a P-type writing control transistor, an N-type threshold compensation transistor, and the like, wherein during a data writing period, the voltage of a data signal line is written to the holding capacitor via the writing control transistor in ON state and the drive transistor brought into a diode-connected state by the threshold compensation transistor in ON state. A capacitance is provided between a first scanning signal line connected to a gate terminal of the writing control transistor and a gate terminal of the drive transistor.
    Type: Application
    Filed: February 1, 2021
    Publication date: March 14, 2024
    Inventors: Kuniaki OKADA, Ryo YONEBAYASHI
  • Publication number: 20230375889
    Abstract: An active matrix substrate includes a substrate that is transparent, and a plurality of pixels positioned on the substrate. Each pixel includes a thin-film transistor (TFT) positioned on the substrate, a first color filter layer disposed on the substrate so as to cover the TFT, a contact hole being provided in the first color filter layer, a pixel electrode that is positioned on a bottom face and a side face of the contact hole, and on the first color filter layer, and that is electrically connected to the TFT via the contact hole, and a second color filter layer disposed within the contact hole.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 23, 2023
    Inventors: Seiichi UCHIDA, Kiyoshi MINOURA, Kuniaki OKADA, Hiromi KATOH, Keisuke YOSHIDA
  • Publication number: 20230161210
    Abstract: An active matrix substrate includes a first TFT disposed in each of pixel regions, a first flattened layer covering the first TFT, and a pixel electrode provided on the first flattened layer. The first TFT includes a lower gate electrode, a lower gate insulating layer, an oxide semiconductor layer, an upper gate insulating layer, and an upper gate electrode. The active matrix substrate further includes a first connection electrode for electrically connecting a drain contact region of the oxide semiconductor layer and the pixel electrode. The first flattened layer includes a pixel contact hole formed so as to expose a part of the first connection electrode. The bottom face of the pixel contact hole at least partially overlaps, of a lower gate metal layer including a lower gate electrode and an upper gate metal layer including an upper gate electrode, at least the lower gate metal layer when viewed from the normal direction of the substrate.
    Type: Application
    Filed: November 1, 2022
    Publication date: May 25, 2023
    Inventors: Atsushi HACHIYA, Hiroaki FURUKAWA, Yuhichi SAITOH, Kuniaki OKADA
  • Patent number: 11550196
    Abstract: A display device in the present disclosure includes the following: a substrate; a plurality of source bus lines extending in a first direction above the substrate; a plurality of semiconductor layers extending in the first direction above the plurality of source bus lines; and a first groove-shaped recess extending in a second direction crossing the first direction, the first groove-shaped recess constituting a first contact hole extending from above the plurality of source bus lines to the plurality of source bus lines. Each of the plurality of semiconductor layers is disposed along a surface of the first groove-shaped recess so as to cross the first groove-shaped recess, and each of the plurality of semiconductor layers is electrically connected to each of the plurality of source bus lines on the bottom surface of the first groove-shaped recess.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: January 10, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Atsushi Hachiya
  • Publication number: 20220291559
    Abstract: A display device in the present disclosure includes the following: a substrate; a plurality of source bus lines extending in a first direction above the substrate; a plurality of semiconductor layers extending in the first direction above the plurality of source bus lines; and a first groove-shaped recess extending in a second direction crossing the first direction, the first groove-shaped recess constituting a first contact hole extending from above the plurality of source bus lines to the plurality of source bus lines. Each of the plurality of semiconductor layers is disposed along a surface of the first groove-shaped recess so as to cross the first groove-shaped recess, and each of the plurality of semiconductor layers is electrically connected to each of the plurality of source bus lines on the bottom surface of the first groove-shaped recess.
    Type: Application
    Filed: February 15, 2022
    Publication date: September 15, 2022
    Inventors: KUNIAKI OKADA, ATSUSHI HACHIYA
  • Patent number: 11067843
    Abstract: A display device for a head-mounted display includes a first display panel and a second display panel that are arranged in parallel. The first display panel and second display panel each include a pair of substrates having a plane sectioned into a display region and a non-display region, and a columnar spacer interposed between the substrates. The substrate includes a spacer lightproof portion placed over the spacer. The first display panel and second display panel do not coincide with each other with regard to a location where the spacer lightproof portion in the display region is disposed.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: July 20, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Hiromi Katoh, Keisuke Yoshida
  • Patent number: 10976626
    Abstract: A display device includes: an active matrix substrate including a plurality of pixels arrayed in a matrix shape, wherein the active matrix substrate includes, in each of the plurality of pixels, a TFT, an insulating layer substantially covering the TFT, a pixel electrode formed of a transparent conductive material and electrically connected to the TFT, a color filter located between the TFT and the pixel electrode, and an intermediate layer electrode formed of a transparent conductive material, at least partially located between the insulating layer and the color filter, and electrically connecting a drain electrode of the TFT to the pixel electrode, the pixel electrode is connected to the intermediate layer electrode at a contact hole formed in the color filter, and when viewed in a normal direction of a display surface, the contact hole at least partially overlaps a gate electrode of the TFT.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: April 13, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Keisuke Yoshida
  • Publication number: 20200393730
    Abstract: A display device includes: an active matrix substrate including a plurality of pixels arrayed in a matrix shape, wherein the active matrix substrate includes, in each of the plurality of pixels, a TFT, an insulating layer substantially covering the TFT, a pixel electrode formed of a transparent conductive material and electrically connected to the TFT, a color filter located between the TFT and the pixel electrode, and an intermediate layer electrode formed of a transparent conductive material, at least partially located between the insulating layer and the color filter, and electrically connecting a drain electrode of the TFT to the pixel electrode, the pixel electrode is connected to the intermediate layer electrode at a contact hole formed in the color filter, and when viewed in a normal direction of a display surface, the contact hole at least partially overlaps a gate electrode of the TFT.
    Type: Application
    Filed: June 8, 2020
    Publication date: December 17, 2020
    Inventors: Kuniaki OKADA, Keisuke YOSHIDA
  • Publication number: 20200319499
    Abstract: A display device for a head-mounted display includes a first display panel and a second display panel that are arranged in parallel. The first display panel and second display panel each include a pair of substrates having a plane sectioned into a display region and a non-display region, and a columnar spacer interposed between the substrates. The substrate includes a spacer lightproof portion placed over the spacer. The first display panel and second display panel do not coincide with each other with regard to a location where the spacer lightproof portion in the display region is disposed.
    Type: Application
    Filed: March 30, 2020
    Publication date: October 8, 2020
    Inventors: KUNIAKI OKADA, HIROMI KATOH, KEISUKE YOSHIDA
  • Patent number: 10768496
    Abstract: An array board 11b includes a gate line 19, a TFT 17, a pixel electrode 18, a display pixel PX, and a second interlayer insulation film 27. The TFT 17 includes a gate electrode 17a formed from a part of the gate line 19, a channel section 17d formed from an oxide semiconductor film 24, a source section 17b connected to one end of the channel section 17d, and a drain section 17c connected to another end of the channel section 17d and formed from the oxide semiconductor film 24 having resistance lower than the channel section 17d. The pixel electrode 18 is connected to the drain section 17c. The display pixel PX includes the TFT 17 and the pixel electrode 18. The second interlayer insulation film 27 has a second hole in a position overlapping the pixel electrode and the drain section 17c and not overlapping the gate electrode 17a.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: September 8, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiichi Uchida, Kuniaki Okada, Naoki Ueda, Takahiro Sasaki
  • Patent number: 10698283
    Abstract: A liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, and a plurality of columnar spacers. The pixel arrangement is a stripe arrangement including red, green and blue pixel columns. The first substrate includes TFTs, one for each pixel, wherein each TFT includes an oxide semiconductor layer. The second substrate includes a color filter layer and a light-blocking layer. The light-blocking layer includes a plurality of first shading portions extending along the column direction, and a plurality of second shading portions extending along the row direction. Each of the columnar spacers is aligned with one of the second shading portions.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 30, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Seiichi Uchida
  • Publication number: 20200019004
    Abstract: A liquid crystal display device for head-mounted displays includes a first substrate, a second substrate, a liquid crystal layer, and a plurality of columnar spacers. The first substrate has a TFT provided in each pixel, a plurality of gate bus lines, and a plurality of source bus lines. The TFT includes an oxide semiconductor layer. Each columnar spacer is in contact with both of the first substrate and the second substrate. The second substrate includes a light shielding layer, the light shielding layer including first light shielding portions overlapping the gate bus lines or the source bus lines and second light shielding portions respectively overlapping the columnar spacers. Each columnar spacer is placed in one of the plurality of blue pixels. The second light shielding portions of the light shielding layer are placed so that, in those blue pixels in which the second light shielding portions exist, a decrease in aperture ratio ascribable to the second light shielding portions is 30% or less.
    Type: Application
    Filed: February 6, 2018
    Publication date: January 16, 2020
    Inventors: Seiichi UCHIDA, Kuniaki OKADA
  • Publication number: 20200004073
    Abstract: A liquid crystal display device (100A) includes a TFT substrate (10), a counter substrate (30), and a liquid crystal layer (50). The TFT substrate includes gate bus lines (GL) extending in a first direction and source bus lines (SL) extending in a second direction. The counter substrate includes a plurality of columnar spacers (40) defining a thickness of the liquid crystal layer. A surface of the TFT substrate on the liquid crystal layer side includes a plurality of first projections overlapping a plurality of gate bus lines to extend in the first direction, and protruding on the liquid crystal layer side, and a plurality of second projections overlapping a plurality of source bus lines to extend in the second direction and protruding toward the liquid crystal layer. The plurality of columnar spacers include a first columnar spacer (40a) supporting at least two projections among the plurality of first projections or at least two projections among the plurality of second projections on a top surface.
    Type: Application
    Filed: March 12, 2018
    Publication date: January 2, 2020
    Inventors: KUNIAKI OKADA, SEIICHI UCHIDA
  • Patent number: 10386684
    Abstract: A semiconductor device (100A) includes a thin film transistor (10), an inter-layer insulation layer (22) covering the thin film transistor, and a transparent conductive layer (24) formed on the inter-layer insulation layer. The metal oxide layer (16) of the thin film transistor includes a first portion (16a) overlapping the gate electrode (12) via a gate insulation layer (14) and a second portion (16b) not overlapping the gate electrode (12). The second portion (16b) crosses a different edge (e2) different from an edge (e1) of the drain electrode (18d) on a side of the first portion when viewed in the normal direction of the substrate (11). The inter-layer insulation layer has a contact hole (22a) disposed to overlap a part of the drain electrode (18d) and at least a part of the second portion (16b) of the metal oxide layer when viewed in the normal direction of the substrate.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: August 20, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Seiichi Uchida, Naoki Ueda, Sumio Katoh
  • Patent number: 10386670
    Abstract: A first substrate of a display device includes a TFT provided for each pixel and including an oxide semiconductor layer. A second substrate includes a color filter layer and a light blocking layer. At least one of a first, second and third color filter included in the color filter layer has an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less. In pixels provided with color filters having an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less, the light blocking layer (a) includes a TFT shading portion extending along a channel length direction and having a width that is less than or equal to a length of the oxide semiconductor layer along a channel width direction; (b) includes a TFT shading portion extending along the channel width direction and having a width that is less than or equal to the length of the oxide semiconductor layer along the channel length direction; or (c) includes no TFT shading portion.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: August 20, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiichi Uchida, Kuniaki Okada, Naoki Ueda
  • Publication number: 20190243194
    Abstract: An active matrix substrate (100) has the following: a substrate (12); a first thin film transistor (10A) that is supported on the substrate (12) and that has a first semiconductor layer (13A) including crystalline silicon; a second thin film transistor (10B) that is supported on the substrate (12) and that has a second semiconductor layer (17) including an oxide semiconductor; and a third semiconductor layer (13B) including silicon, which is disposed on the substrate (12) side of the second semiconductor layer (17) of the second thin film transistor (10B), with a first insulating layer (14) interposed between the third semiconductor layer and the second semiconductor layer.
    Type: Application
    Filed: August 29, 2017
    Publication date: August 8, 2019
    Inventor: Kuniaki OKADA
  • Publication number: 20190179181
    Abstract: A first substrate of a liquid crystal display device includes a plurality of gate lines, a plurality of source lines, a TFT and a pixel electrode provided in each of the pixels, a first insulating layer covering the source lines, and a first alignment film. A second substrate includes a light-blocking layer, a plurality of columnar spacers, and a second alignment film. A drain electrode of the TFT is a transparent drain electrode formed from the same transparent conductive film as the pixel electrode. Each columnar spacer is arranged in an intersecting region where one of the gate lines and one of the source lines intersect with each other. The first insulating layer has first openings formed in the intersecting regions corresponding to at least some columnar spacers. A surface of the first substrate on a side of the liquid crystal layer has depressed portions that are defined by the first openings. Distal end portions of the at least some columnar spacers are located in the depressed portions.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 13, 2019
    Inventors: Seiichi UCHIDA, Kuniaki OKADA