Patents by Inventor Kuniaki Tsurushima

Kuniaki Tsurushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8129277
    Abstract: A method of machining a wafer in which, at the time of grinding the back-side surface of the wafer, only a back-side surface region corresponding to a device formation region where semiconductor chips are formed is thinned by grinding, to form a recessed part on the back side of the wafer. An annular projected part surrounding the recessed part is utilized to secure rigidity of the wafer. Next, the recessed part is etched to cause metallic electrodes to project from the bottom surface of the recessed part, thereby forming a back-side electrode parts, then an insulating film is formed in the recessed part, and the insulating film and end surfaces of the back-side electrode parts are cut.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: March 6, 2012
    Assignee: Disco Corporation
    Inventors: Yusuke Kimura, Kuniaki Tsurushima
  • Publication number: 20090004859
    Abstract: A method of machining a wafer in which, at the time of grinding the back-side surface of the wafer, only a back-side surface region corresponding to a device formation region where semiconductor chips are formed is thinned by grinding, to form a recessed part on the back side of the wafer. An annular projected part surrounding the recessed part is utilized to secure rigidity of the wafer. Next, the recessed part is etched to cause metallic electrodes to project from the bottom surface of the recessed part, thereby forming a back-side electrode parts, then an insulating film is formed in the recessed part, and the insulating film and end surfaces of the back-side electrode parts are cut.
    Type: Application
    Filed: June 18, 2008
    Publication date: January 1, 2009
    Applicant: DISCO CORPORATION
    Inventors: Yusuke Kimura, Kuniaki Tsurushima
  • Publication number: 20040091342
    Abstract: A semiconductor chip pickup apparatus comprises support means for supporting a tape having many semiconductor chips adhered onto the face of the tape; and pickup means for individually picking up the semiconductor chips from the face of the tape supported on the support means. The support means includes a plurality of support lines, extending parallel at spaced locations, for supporting the back of the tape. Suction means is disposed for sucking the back of the tape, thereby peeling the tape from the semiconductor chips in regions other than the support lines.
    Type: Application
    Filed: September 11, 2003
    Publication date: May 13, 2004
    Inventors: Kouichi Yajima, Kuniaki Tsurushima
  • Patent number: 5741410
    Abstract: The present invention relates to a method and apparatus for forming ball electrodes on electrode pads provided on a package. Solder balls and the electrode pads can be aligned with each other with high precision, and the cost of processing can be decreased. An installation apparatus for balls which holds the solder balls by vacuum suction is preferably formed of heat-resisting glass or other transparent material through which the balls may be observed. The solder balls are aligned with electrode pads provided on a package, and brought into contact with the electrode pads, with the solder balls and the electrode pads capable of being viewed through the installation apparatus from the top. Thereafter, a light beam is radiated from a light beam radiation light through the installation apparatus, thereby successively melting soldering paste on the electrode pads. In such a manner, the solder balls are fixed to the electrode pads. Consequently, ball electrodes are precisely formed.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: April 21, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kuniaki Tsurushima
  • Patent number: 5467803
    Abstract: An outer lead bending apparatus comprises a fixed unit, a movable unit movable toward and away from the fixed unit, a first die detachably mounted on one of the fixed unit and movable unit and holding a semiconductor package devise in place, and a second die detachably mounted on the other unit and, when the movable unit is driven toward the fixed unit, bending, together with the first die, the outer leads of the semiconductor package devise into a given configuration.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: November 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Yoshimura, Hiroshi Shibata, Fumio Takahashi, Kuniaki Tsurushima
  • Patent number: 5417830
    Abstract: An injection plating apparatus for uniformly plating external leads of a semiconductor product having a lead-missing portion. The injection plating apparatus comprises cavity boxes for compressing a semiconductor product. Masks, attached to the cavity boxes, serve as masks in plating injection for covering at least a lead-missing portion of the semiconductor product. The injection plating apparatus further comprises means for plating the external leads of the semiconductor product.
    Type: Grant
    Filed: December 1, 1993
    Date of Patent: May 23, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kuniaki Tsurushima