Abstract: A semiconductor substrate includes a single crystal Ga2O3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga2O3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga2O3-based substrate.

Abstract: A support substrate 2 is a polycrystalline SiC substrate formed of polycrystalline SiC. Assuming that one of the two sides of the polycrystalline SiC substrate is a first side and that the other side is a second side, a substrate grain size change rate of the polycrystalline SiC substrate, which is a value obtained by dividing a difference between the average value of crystal grain sizes of the polycrystalline SiC on the first side and the average value of crystal grain sizes of the polycrystalline SiC on the second side by a thickness of the polycrystalline SiC substrate, is 0.43% or less. A radius of curvature of the polycrystalline SiC substrate is 142 m or more.

Abstract: A semiconductor substrate includes a single crystal Ga2O3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga2O3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga2O3-based substrate.

Abstract: A support substrate 2 is a polycrystalline SiC substrate formed of polycrystalline SiC. Assuming that one of the two sides of the polycrystalline SiC substrate is a first side and that the other side is a second side, a substrate grain size change rate of the polycrystalline SiC substrate, which is a value obtained by dividing a difference between the average value of crystal grain sizes of the polycrystalline SiC on the first side and the average value of crystal grain sizes of the polycrystalline SiC on the second side by a thickness of the polycrystalline SiC substrate, is 0.43% or less. A radius of curvature of warpage of the polycrystalline SiC substrate is 142 m or more.

Abstract: A method for manufacturing a semiconductor substrate may comprise irradiating a surface of a first semiconductor layer and a surface of a second semiconductor layer with one or more types of first impurity in a vacuum. The method may comprise bonding the surface of the first semiconductor layer and the surface of the second semiconductor layer to each other in the vacuum. The method may comprise applying heat treatment to the semiconductor substrate produced in the bonding. The first impurity may be an inert impurity that does not generate carriers in the first and second semiconductor layers. The heat treatment may be applied such that a width of an in-depth concentration profile of the first impurity contained in the first and second semiconductor layers is narrower after execution of the heat treatment than before the execution of the heat treatment.

Abstract: A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.

Abstract: A method for manufacturing a semiconductor substrate may comprise irradiating a surface of a first semiconductor layer and a surface of a second semiconductor layer with one or more types of first impurity in a vacuum. The method may comprise bonding the surface of the first semiconductor layer and the surface of the second semiconductor layer to each other in the vacuum. The method may comprise applying heat treatment to the semiconductor substrate produced in the bonding. The first impurity may be an inert impurity that does not generate carriers in the first and second semiconductor layers. The heat treatment may be applied such that a width of an in-depth concentration profile of the first impurity contained in the first and second semiconductor layers is narrower after execution of the heat treatment than before the execution of the heat treatment.

Abstract: A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.

Abstract: There is provided a silicon carbide substrate composed of silicon carbide, including encapsulated regions inside, which form incoherent boundaries between the silicon carbide and the encapsulated regions, wherein propagation of stacking faults in the silicon carbide is blocked.

Abstract: There is provided a silicon carbide substrate composed of silicon carbide, including encapsulated regions inside, which form incoherent boundaries between the silicon carbide and the encapsulated regions, wherein propagation of stacking faults in the silicon carbide is blocked.

Abstract: To provide a silicon carbide substrate having at least one or more main surfaces, including: a plurality of encapsulated regions inside, wherein the plurality of encapsulated regions are distributed in a direction approximately parallel to one of the main surfaces, with each encapsulated region positioned at a distance of 100 nm or more and 100 ?m or less from the main surfaces to inside a substrate, and each encapsulated region having a width of 100 nm or more and 100 ?m or less in a direction parallel to the main surfaces.

Abstract: A process for producing a silicon carbide single crystal in which a silicon carbide single crystal layer is homo-epitaxially or hetero-epitaxially grown on a surface of a single crystal substrate, wherein a plurality of substantially parallel undulation ridges that extend in a first direction on the single crystal substrate surface is formed on said single crystal substrate surface; each of the undulation ridges on said single crystal substrate surface has a height that undulates as each of the undulation ridges extends in the first direction; and the undulation ridges are disposed so that planar defects composed of anti-phase boundaries and/or twin bands that propagate together with the epitaxial growth of the silicon carbide single crystal merge with each other.

Abstract: A method for producing a compound single crystal includes a process (I) of growing the compound single crystal while causing an anti-phase boundary and a stacking fault to equivalently occur in a <110> direction parallel to the surface, the stacking fault being attributable to the elements A and B; a process (II) of merging and annihilating the stacking fault, attributable to the element A, and the anti-phase boundary, which occurs in the process (I); a process (III) of vanishing the stacking fault attributable to the element B, which occurs in the process (I); and a process (IV) of completely merging and annihilating the anti-phase boundary. The process (IV) is carried out simultaneously with the processes (II) and (III) or after the processes (II) and (III).

Abstract: This invention reduces planar defects which occur within a silicon carbide single crystal when a silicon carbide single crystal is epitaxially grown on a single crystal substrate. The process for producing a silicon carbide single crystal in which a silicon carbide single crystal layer is epitaxially grown on the surface of a single crystal substrate is a process in which a plurality of undulations that extend in a single, substantially parallel direction on the substrate surface is formed on the single crystal substrate surface; undulation ridges on the single crystal substrate undulate in the thickness direction of the single crystal substrate; and the undulations are disposed so that planar defects composed of anti-phase boundaries and/or twin bands that propagate together with the epitaxial growth of the silicon carbide single crystal merge with each other.

Abstract: Provided are a compound semiconductor crystal substrate capable of reducing planar defects such as twins and anti-phase boundaries occurring in epitaxially grown crystals without additional steps beyond epitaxial growth, and a method of manufacturing the same. A compound single crystal substrate, the basal plane of which is a nonpolar face, with said basal plane having a partial surface having polarity (a partial polar surface). Said partial polar surface is a polar portion of higher surface energy than said basal plane.

Abstract: Provided is a method of manufacturing compound single crystals by epitaxially growing a compound single crystal layer differing from the substrate in which the planar defects generated in the crystal that is epitaxially grown are reduced. The method of manufacturing compound single crystals in which a compound single crystalline layer differing from a compound single crystalline substrate is epitaxially grown on the surface of said substrate. Plural undulations extending in a single direction are present on at least a portion of the surface of said substrate, and in that said undulations are provided in such a manner that as said compound single crystalline layer grows, the defects that grow meet each other.

Abstract: To provide a method of manufacturing silicon carbide by forming silicon carbide on a substrate surface from an atmosphere containing a silicon carbide feedstock gas comprising at least a silicon source gas and a carbon source gas under condition 1 or 2 below: Condition 1: the partial pressure ps of silicon source gas is constant (with ps>0), the partial pressure of carbon source gas consists of a state pc1 and a state pc2 that are repeated in alternating fashion, wherein pc1 and pc2 denote partial pressures of carbon source gas, pc1>pc2, and pc1/ps falls within a range of 1-10 times the attachment coefficient ratio (Ss/Sc), pc2/ps falls within a range of less than one time Ss/Sc; Condition 2: the partial pressure pc of carbon source gas is constant (with pc>0), the partial pressure of silicon source gas consists of a state ps1 and a state ps2 that are repeated in alternating fashion, wherein ps1 and ps2 denote partial pressures of silicon source gas, ps1<ps2, and pc/ps1 falls within a range of 1

Abstract: Provided are a compound semiconductor crystal substrate capable of reducing planar defects such as twins and anti-phase boundaries occurring in epitaxially grown crystals without additional steps beyond epitaxial growth, and a method of manufacturing the same. A compound single crystal substrate, the basal plane of which is a nonpolar face, with said basal plane having a partial surface having polarity (a partial polar surface). Said partial polar surface is a polar portion of higher surface energy than said basal plane.

Abstract: To provide a method of manufacturing compound semiconductor single crystals such as silicon carbide and gallium nitride by epitaxial growth methods, that is capable of yielding compound single crystals of comparatively low planar defect density. The method of manufacturing compound single crystals in which two or more compound single crystalline layers identical to or differing from a single crystalline substrate are sequentially epitaxially grown on the surface of said substrate. At least a portion of said substrate surface has plural undulations extending in a single direction and second and subsequent epitaxial growth is conducted after the formation of plural undulations extending in a single direction in at least a portion of the surface of the compound single crystalline layer formed proximately.

Abstract: Provided are a compound semiconductor crystal substrate capable of reducing planar defects such as twins and anti-phase boundaries occurring in epitaxially grown crystals without additional steps beyond epitaxial growth, and a method of manufacturing the same. A compound single crystal substrate, the basal plane of which is a nonpolar face, with said basal plane having a partial surface having polarity (a partial polar surface). Said partial polar surface is a polar portion of higher surface energy than said basal plane.