Abstract: [Object] To uniformly produce electric fields when performing thinning processing of generating electric fields in only some of a plurality of pixels. [Solution] There is provided an imaging apparatus including: a pair of electric field application electrodes and a pair of electric charge extraction electrodes provided to each of a plurality of pixels; and a voltage application section configured to apply voltage between a first electrode that is one of the pair of electric field application electrodes of a first pixel and a second electrode that is one of the pair of electric field application electrodes of a second pixel when pixel combination is performed, and produce an electric field across the first pixel and the second pixel.

Abstract: There is provided a solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.

Abstract: There is provided a solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.

Abstract: There is provided a solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.

Abstract: There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.

Abstract: There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.

Abstract: [Object] To uniformly produce electric fields when performing thinning processing of generating electric fields in only some of a plurality of pixels. [Solution] There is provided an imaging apparatus including: a pair of electric field application electrodes and a pair of electric charge extraction electrodes provided to each of a plurality of pixels; and a voltage application section configured to apply voltage between a first electrode that is one of the pair of electric field application electrodes of a first pixel and a second electrode that is one of the pair of electric field application electrodes of a second pixel when pixel combination is performed, and produce an electric field across the first pixel and the second pixel.

Abstract: A solid-state imaging element includes a first substrate including a pixel circuit having a pixel array unit, and a second substrate. The second substrate includes signal processing circuits to process signals from the pixel array unit, and a wiring layer with wiring regions electrically connected to respective ones of the signal processing circuits. Each signal processing circuit has a same circuit pattern. The second substrate and the first substrate are stacked. A wiring pattern of each wiring region is different.

Abstract: [Object] To uniformly produce electric fields when performing thinning processing of generating electric fields in only some of a plurality of pixels. [Solution] There is provided an imaging apparatus including: a pair of electric field application electrodes and a pair of electric charge extraction electrodes provided to each of a plurality of pixels; and a voltage application section configured to apply voltage between a first electrode that is one of the pair of electric field application electrodes of a first pixel and a second electrode that is one of the pair of electric field application electrodes of a second pixel when pixel combination is performed, and produce an electric field across the first pixel and the second pixel.

Abstract: There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.

Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.

Abstract: There is provided a solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.

Abstract: A solid-state imaging element includes a first substrate including a pixel circuit having a pixel array unit, and a second substrate. The second substrate includes signal processing circuits to process signals from the pixel array unit, and a wiring layer with wiring regions electrically connected to respective ones of the signal processing circuits. Each signal processing circuit has a same circuit pattern. The second substrate and the first substrate are stacked. A wiring pattern of each wiring region is different.

Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.

Abstract: There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.

Abstract: [Object] To uniformly produce electric fields when performing thinning processing of generating electric fields in only some of a plurality of pixels. [Solution] There is provided an imaging apparatus including: a pair of electric field application electrodes and a pair of electric charge extraction electrodes provided to each of a plurality of pixels; and a voltage application section configured to apply voltage between a first electrode that is one of the pair of electric field application electrodes of a first pixel and a second electrode that is one of the pair of electric field application electrodes of a second pixel when pixel combination is performed, and produce an electric field across the first pixel and the second pixel.

Abstract: The present technology relates to a solid state imaging device that enables a reduction in the manufacturing cost of the solid state imaging device, and an electronic apparatus. A first substrate including a pixel circuit having a pixel array unit and a second substrate including a first and a second signal processing circuit arranged side by side across a scribe area are stacked. The second substrate includes a first moisture-resistant ring surrounding at least part of a periphery of the first signal processing circuit, a second moisture-resistant ring surrounding at least part of a periphery of the second signal processing circuit, a third moisture-resistant ring surrounding at least part of a periphery of the second substrate in a layer different from the first and second moisture-resistant rings, and a barrier unit separating a first area between the first and second moisture-resistant rings and a second area.

Abstract: There is provided a solid-state imaging device including a first substrate having a pixel circuit including a pixel array unit formed thereon, and a second substrate having a plurality of signal processing circuits formed thereon so as to be arranged through a scribe region. The first substrate and the second substrate are stacked.

Abstract: An analog/digital converter circuit including a plurality of reference resistance elements dividing a voltage between two reference potentials to provide a plurality of reference voltages; a plurality of switching blocks which are activated by an upper data conversion output signal in units of rows and compare the respective reference voltages with an input signal to be converted to provide a differential output; an upper data encoder which compares the reference voltage supplied to a switching block positioned at a specific position of the switching block matrix with the input signal to provide a plurality of conversion codes of the upper significant bits; a lower data comparator circuit having first and second comparators with weights N.

Abstract: An analog-to-digital convertor apparatus finds input signals of a comparison output to a virtual reference potential between reference potentials with significantly fewer elements in the comparator than in the prior art. A composite inverted output current and a composite in-phase output current are generated by adding the in-phase comparison output current of the first and second comparison output currents of an input signal to the first and second reference signals. Then, an interpolation output means compares the generated composite output currents with a comparison output current which is opposite in phase to these composite output signals. This enables the comparator circuit to obtain the result of comparison of the input signal to a virtual reference signal existing between the first and second reference signals.