Patents by Inventor Kunihiko Shiota

Kunihiko Shiota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194613
    Abstract: A power semiconductor according to the present disclosed technology is a case-type power semiconductor device, in which a case is formed by mixing a heavy element material and a conductive material with a material having high processability, the conductive material is not a light metal, and the electric resistance of the case is 1.0 E5 to 1.0 E11 [?]. In addition, the power semiconductor according to the present disclosed technology is a transfer mold-type power semiconductor device, and includes a transfer mold-type sealing resin including a sealing resin containing a heavy element material and a sealing resin containing a conductive material, in which the conductive material of the sealing resin containing a conductive material is not a light metal.
    Type: Application
    Filed: April 2, 2021
    Publication date: June 13, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hirotaku ISHIKAWA, Koki KISHIMOTO, Kazutake KADOWAKI, Kunihiko TAJIRI, Yoshitaka MIYAJI, Hiroki SHIOTA, Yasutomo OTAKE
  • Patent number: 11972991
    Abstract: A semiconductor device includes: an inner frame that surrounds an outer circumference of a semiconductor chip; and an outer frame that surrounds an outer circumference of the inner frame; wherein the outer frame is configured with an exterior wall that surrounds the outer circumference of the inner frame, and a fibrous reinforcing member that is wound on an outer circumference of the exterior wall. This prevents the broken pieces of a component that constitutes the semiconductor device from being scattered outside the semiconductor device, thereby not only to achieve improvement in the reliability of the entire system, but also to achieve downsizing of the semiconductor device.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: April 30, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroki Shiota, Tetsuo Motomiya, Kunihiko Tajiri, Jun Okada, Hiroumi Yamada, Kazutake Kadowaki
  • Patent number: 5879970
    Abstract: Polycrystalline silicon-germanium alloy is grown on a glass substrate through a chemical vapor deposition under the conditions where the substrate temperature ranges from 350 degrees to 450 degrees in centigrade, the ratio between gas flow rate of Si.sub.2 H.sub.6 and the gas flow rate of GeF.sub.4 ranges from 20:0.9 to 40:0.9 and the dilution gas is selected from the group consisting of helium, argon, nitrogen and hydrogen, and the composition ratio of silicon of the polycrystalline silicon-germanium is equal to or greater than 80 percent so that the carrier mobility is drastically improved.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: March 9, 1999
    Assignee: NEC Corporation
    Inventors: Kunihiko Shiota, Jun-ichi Hanna