Abstract: A steam turbine 10 is provided with a double-structure comprising an inner casing 20 and an outer casing 21. A turbine rotor 22, in which plural stages of moving blades 24 are circumferentially implanted, is operatively disposed in inner casing 20. A diaphragm outer ring 25 and a diaphragm inner ring are disposed along the circumferential direction in inner casing 20. Stationary blades 27 are circumferentially provided between diaphragm outer ring 25 and the diaphragm inner ring, so that diaphragm outer ring 25, the diaphragm inner ring and stationary blades 27 form a stage of stationary blades. The stages of the stationary blades are arranged alternately with the stages of moving blades 24 in the axial direction of turbine rotor 22. A cooling medium passage 40 for passing a cooling medium CM which is supplied through a supply pipe 45 is formed between inner casing 20 and diaphragm outer ring 25.

Abstract: A ceramic-coated member is configured by laminating at least a thermal stress relieving layer 22 and a thermal barrier layer 23 in this order on a base material 20 of metal or ceramic. A density of zirconium oxide forming the thermal stress relieving layer 22 decreases continuously and a density of hafnium oxide forming the thermal barrier layer 23 increases continuously from the thermal stress relieving layer 22 toward the thermal barrier layer 23 in a boundary portion 24 and its neighborhood between the thermal stress relieving layer 22 and the thermal barrier layer 23.

Abstract: A separator of a proton exchange fuel cell. In a cell stack of a proton exchange fuel cell, the cell stack composed by laminating a plurality of unit cells and a plurality of separators, each of the unit cells composed of an anode electrode, a cathode electrode and a solid polymer electrolytic membrane arranged between the anode and cathode electrodes, each of the separators arranged between the unit cells, respectively, the separator of the proton exchange fuel cell includes a separator substrate and a multi-coating layer formed on the separator substrate. The multi-coating layer includes at least two layers of a low electric resistance layer, a corrosion resistance layer and a peeling resistance layer.

Abstract: A high temperature component such a gas turbine high temperature component, for example, constituting movable or stationary blade portion, thereby comprises a base material and a thermal barrier coating coated on a surface of the base material. The thermal barrier coating has a thermal barrier characteristic controlled in accordance with an environment to which a high temperature component is exposed so as to make substantially uniform a surface temperature of the base material. The thermal barrier coating comprises a thermal barrier ceramic layer having a thermal barrier characteristic capable of being controlled by varying a thickness thereof at portions of the thermal barrier ceramic layer.

Abstract: A ceramic composite material comprises a ceramic material constituting a matrix, and dispersion particles disposed in the matrix in a dispersing manner. A specific shape of a ceramic composite material is, for instance, a sinter or a thermally sprayed layer. The dispersion particles are consisting of a composite oxide including at least one kind of a first metallic element selected from alkaline earth metals such as Mg and Ca, and at least one kind of a second metallic element selected from W, Ti, Ta, Mo, Nb, V, B, Te, Ge and Si, for instance, are composite oxide particles precipitated by reacting a compound containing a first metallic element and a compound including a second metallic element through heat treatment. The precipitated particles consisting of such a composite oxide can be dispersed as planar particles or acicular particles in the ceramic layer to which, for instance, thermal spraying is applied.

Abstract: A gas turbine apparatus having a plurality of stages of rotor.stator blade and utilizing fuel containing 0.5 ppm or more of vanadium. A plurality of stages of the rotor.stator blade have a stage which is driven by combustion gas not including vanadium corrosion suppressing agent and a stage which is driven by combustion gas including vanadium corrosion suppressing agent and is controlled in its combustion gas temperature at below 1,458 K. In addition, the plurality of stages of the gas turbine are supplied with different kinds of combustion gases according to the temperature of each stage. Or, by disposing at least two systems of fuel supplying mechanism to one combustion chamber, the combustion temperature is controlled according to the kinds and the mixing ratio of the fuels. Therewith, while suppressing corrosion of high temperature member due to V and S, the deposition of the reaction products due to the vanadium corrosion suppressing agent and the like can be suppressed.

Abstract: A ceramic coating layer which is not less than 70 .mu.m in the maximum height Rmax of its profile curves and not less than 45 .mu.m in the 10-point average roughness, or which is less than 650 HV in Vickers hardness is provided on a metallic substrate. A heat-resistant member of such composition is excellent in thermal fatigue resistance and keeps an excellent heat resistance for a long period of time. Quality of a heat-resistant member is evaluated by, measuring at least one of roughness and hardness of a ceramic coating layer on a metallic substrate. According to this method, it is possible to easily and accurately evaluate a thermal resistant life of a heat-resistant member.

Abstract: A heat resisting member having ceramics heat shield layers which is directly formed on a metal base material or formed on it via a metal bonded layer formed on the metal base material. The ceramics heat shield layers comprise a first ceramics layer which is formed on the metal base material or the metal bonded layer and has a high elastic modulus, high hardness and high density, and a second ceramics layer which is formed on the first ceramics layer and has a low elastic modulus, low hardness and low density. Delamination from the neighborhood of the interface or oxidation of the lower layer can be prevented by the first ceramics layer which is formed on the metal base material or the metal bonded layer. Thermal shock resistance and heat shielding effect of the ceramics heat shield layers as the whole can be enhanced by the second ceramics layer.

Abstract: A heat-resistant member is constructed by having a ceramic coating layer deposited on the surface of a metallic substrate through the medium of a metallic bonding layer. The metallic bonding layer is composed of at least two layers, i.e. a layer of an aggregate of minute particles disposed on the metallic substrate side and a layer of an aggregate of coarse particles disposed on the ceramic coating layer side. Otherwise, the metallic bonding layer is composed of at least three layers, i.e. two layers of an aggregate of coarse particles disposed one each on the metallic substrate side and the ceramic coating layer side and one layer of an aggregate of minute particles interposed between these two layers of an aggregate of coarse particles. These layers are obtained by the low pressure ambient plasma thermal spraying using a fine powder or a coarse powder of an alloy resistant to corrosion and oxidation.

Abstract: A substrate has a semiconductor-on-insulator structure. The substrate has a base substrate, an insulator layer provided on the base substrate, an active substrate provided on the insulator layer and having gettering sites, and an active layer provided on the active substrate and made of a semiconductor. The gettering sites under the active layer eliminate crystal defects and impurities generated in the active layer during the semiconductor device production in which elements are formed in the active layer.

Abstract: A substrate has a semiconductor-on-insulator structure. The substrate has a base substrate, an insulator layer provided on the base substrate, an active substrate provided on the insulator layer and having gettering sites, and an active layer provided on the active substrate and made of a semiconductor. The gettering sites under the active layer eliminate crystal defects and impurities generated in the active layer during the semiconductor device production in which elements are formed in the active layer.

Abstract: A method for measuring lattice defects in semiconductor such as a silicon crystal, detects an ultrasonic velocity of an ultrasonic pulse propagating through the semiconductor to which heat is variably applied. An elastic constant of the semiconductor is calculated from the ultrasonic velocity, and a concentration or density of lattice defects of the semiconductor is obtained by converting the elastic constant.

Abstract: A programmable semiconductor read only memory device which includes a memory cell array formed by a plurality of memory cells arranged in a matrix arrangement. Each memory cell in the memory cell array includes a transistor having a gate thereof coupled to a word line, and a capacitor having an insulator layer, having a first terminal coupled to a bit line and having a second terminal coupled to the transistor so that the capacitor is grounded via the transistor. The insulator layer of the capacitor of a selected memory cell breaks down when a specific word line and a specific bit line coupled to the selected memory cell are driven, thereby making the capacitor conductive.

Abstract: Disclosed here is an IGFET formed on the single crystal silicon substrate where the major plane surface is deviated within the range from 22 degree to 34 degree toward the crystallographic surface {1,1,1} from {1,0,0} or on the silicon epitaxial layer formed on said substrate. Here, generation of silicon nitride is suppressed, which is newly formed under the mask in the selective oxidation process using the silicon nitride as the mask and also is the main cause of lowering the breakdown voltage of the gate insulating film. In addition, various kinds of functional characteristics depending on the crystallographic surface orientation are not interfered at all. Thereby, the present invention can offer an IGFET which drastically improved the breakdown voltage failure rate of the gate insulating film while keeping the functional characteristics at the best condition.

Abstract: Disclosed here is an IGFET formed on the single crystal silicon substrate where the major plane surface is deviated within the range from 22 degree to 34 degree toward the crystallographic surface {1,1,1,} from {1,0,0} or on the silicon epitaxial layer formed on said substrate. Here, generation of silicon nitride is suppressed, which is newly formed under the mask in the selective oxidation process using the silicon nitride as the mask and also is the main cause of lowering the breakdown voltage of the gate insulating film. In addition, various kinds of functional characteristics depending on the crystallographic surface orientation are not interfered at all. Thereby, the present invention can offer an IGFET which drastically improved the breakdown voltage failure rate of the gate insulating film while keeping the functional characteristics at the best condition.

Abstract: A method of fabricating semiconductor integrated circuit devices in which leakage currents at the junction and at the surface of one or more regions of desired conductivity type formed in a substrate are substantially reduced. Shallow source and drain regions are formed by ion implantation of arsenic, an insulating layer of phosphosilicate glass (PSG) is formed on the entire surface of the semiconductor substrate, openings are cut through the PSG layer to form windows of smaller area than the surface area of the regions for contacts, electrodes, to the regions, oxygen ions having the effect of gettering defects are ion implanted through these windows into the surface of source and drain regions but controlled so as not to reach the pn junctions, and the PSG layer is thermally melted to produce a MOS memory device, other MOS devices, or bipolar transistors.

Abstract: An exhaust gas containing nitrogen oxides is efficiently purified without the necessary use of catalysts by contacting the exhaust gas with a nitrile compound at high temperature in the presence of oxygen, whereby the nitrogen oxides and the nitrile compound are selectively decomposed into harmless materials.

Abstract: A semiconductor memory device, which comprises: a P-type semiconductor material comprising on the surface thereof, an N-type doped layer, one surface region of the substrate adjoining the doped layer being used as a gate region, and further comprising in the interior thereof an N-type buried layer below another surface region of said substrate adjoining said one surface region. Electric charges representing information are stored in the buried layer. The reading time and the refreshing period are improved by shortening said reading time and lengthening said refreshing time utilization of said N-type buried layer.

Abstract: A semiconductor memory device provided with one transferring electrode, one gate electrode and one diode of a charge coupled device is produced by a process with a reduced number of steps of diffusion and patterning. Both electrodes consists of doped polycrystalline silicon and both are electrically connected to a resistive layer which consists of non-doped polycrystalline silicon. A potential barrier between the region of both electrodes is removed due to the resistive layer. Resistive layer is formed by utilization of a two-stage deposition of the polycrystalline silicon layer with appropriate mashing steps.

Abstract: A semiconductor memory device provided with one transferring electrode, one gate electrode and one diode of a charge coupled device is produced by a process with a reduced number of steps of diffusion and patterning. Both electrodes consist of doped polycrystalline silicon and both are electrically connected to a resistive layer which consists of non-doped polycrystalline silicon. A potential barrier between the region of both electrodes is removed due to the resistive layer. The resistive layer is formed by utilization of a two stage deposition of the polycrystalline silicon layer with appropriate masking steps.