Patents by Inventor Kuninori Kitahara
Kuninori Kitahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230052837Abstract: Provided are a solar cell and a light emitting device with low leakage current and low cost, using ZnO fine particles. A p-type ZnO layer (p-type layer) (14) made primarily of p-type ZnO fine particles (931) is formed. P-side electrodes (16) are formed at a plurality of regions on the p-type layer (14). A thin insulating layer (18) is formed between an n-type layer (13) and the p-type layer (14). In the insulating layer (18), openings are formed at regions A each not overlapping the p-side electrodes (16) and being apart from them in a plan view. In the configuration, by thus making the p-side electrodes (16) apart from the regions A, the length of a current path in the p-type layer (14) can be made substantially larger than the layer thickness. Accordingly, even when n-type ZnO fine particles (932) are incorporated in the p-type layer (14), it is possible to interpose some of the p-type ZnO fine particles (931) along a leakage current path caused by the incorporation, and thereby cut off the current path.Type: ApplicationFiled: February 5, 2021Publication date: February 16, 2023Applicant: S-Nanotech Co-Creation Co., Ltd.Inventors: Yasuhisa FUJITA, Kuninori KITAHARA, Jie LIN
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Patent number: 6660085Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.Type: GrantFiled: March 21, 2001Date of Patent: December 9, 2003Assignee: Fujitsu LimitedInventors: Akito Hara, Kuninori Kitahara
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Patent number: 6566754Abstract: A method of manufacturing a semiconductor device having a polycrystalline semiconductor layer includes the steps of: preparing a base substrate; forming a first semiconductor layer on a surface of the base substrate; forming a first polycrystalline semiconductor layer by applying an energy beam to the first semiconductor layer; etching a surface layer of the first polycrystalline semiconductor layer; and after the etching process, forming a second semiconductor layer on a surface of the first polycrystalline semiconductor layer without exposing the surface of the first polycrystalline semiconductor layer to an atmospheric air. The final polycrystalline semiconductor layer has a high film quality.Type: GrantFiled: July 20, 2001Date of Patent: May 20, 2003Assignee: Fujitsu LimitedInventors: Akito Hara, Kuninori Kitahara, Satoshi Murakami
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Patent number: 6335266Abstract: A polycrystalline semiconductor material containing Si, Ge or SiGe, wherein the material contains H atoms and the number of monohydride structures of couplings between Si or Ge, and H is larger than the number of higher-order hydride structures, or in other words, a peak intensity of a monohydride structure in a local vibration mode measured by a Raman spectral analysis is higher than a peak intensity of a higher-order hydride structure. By configuring the compositions of a polycrystalline semiconductor material in the above manner, the carrier mobility can be made high.Type: GrantFiled: May 15, 2000Date of Patent: January 1, 2002Assignee: Fujitsu LimitedInventors: Kuninori Kitahara, Satoshi Murakami, Akito Hara
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Publication number: 20010046755Abstract: A method of manufacturing a semiconductor device having a polycrystalline semiconductor layer includes the steps of: preparing a base substrate; forming a first semiconductor layer on a surface of the base substrate; forming a first polycrystalline semiconductor layer by applying an energy beam to the first semiconductor layer; etching a surface layer of the first polycrystalline semiconductor layer; and after the etching process, forming a second semiconductor layer on a surface of the first polycrystalline semiconductor layer without exposing the surface of the first polycrystalline semiconductor layer to an atmospheric air. The final polycrystalline semiconductor layer has a high film quality.Type: ApplicationFiled: July 20, 2001Publication date: November 29, 2001Applicant: FUJITSU LIMITEDInventors: Akito Hara, Kuninori Kitahara, Satoshi Murakami
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Publication number: 20010041391Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.Type: ApplicationFiled: March 21, 2001Publication date: November 15, 2001Applicant: FUJITSU, LTD.Inventors: Akito Hara, Kuninori Kitahara
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Patent number: 6287944Abstract: A method of manufacturing a semiconductor device having a polycrystalline semiconductor layer includes the steps of: preparing a base substrate; forming a first semiconductor layer on a surface of the base substrate; forming a first polycrystalline semiconductor layer by applying an energy beam to the first semiconductor layer; etching a surface layer of the first polycrystalline semiconductor layer; and after the etching process, forming a second semiconductor layer on a surface of the first polycrystalline semiconductor layer without exposing the surface of the first polycrystalline semiconductor layer to an atmospheric air. The final polycrystalline semiconductor layer has a high film quality.Type: GrantFiled: August 18, 1999Date of Patent: September 11, 2001Assignee: Fujitsu LimitedInventors: Akito Hara, Kuninori Kitahara, Satoshi Murakami
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Patent number: 6255148Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.Type: GrantFiled: June 8, 1999Date of Patent: July 3, 2001Assignee: Fujitsu LimitedInventors: Akito Hara, Kuninori Kitahara
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Patent number: 6159854Abstract: A process of growing a conductive layer on a substrate by a chemical reaction of a source gas on the substrate includes preparing a substrate having an area covered with a coating layer of a material different from a material of the substrate and an area not covered with the coating layer; supplying a first source gas onto the substrate and causing a chemical reaction of the first source gas to occur on the substrate only in the area not covered with the coating layer, thereby selectively growing a first conductive layer on the substrate only in the area not covered with the coating layer; terminating the supplying of the first source gas; and supplying a second source gas onto the substrate and causing a chemical reaction of the second source gas to occur on both of the first conductive layer and the coating layer, thereby unselective growing a second conductive layer of the same conductive material as the first conductive layer, on both of the first conductive layer and the coating layer.Type: GrantFiled: May 31, 1995Date of Patent: December 12, 2000Assignee: Fujitsu LimitedInventors: Nobuyuki Ohtsuka, Yasuo Matsumiya, Kuninori Kitahara
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Patent number: 5970369Abstract: A multilayer polysilicon semiconductor device having a first layer of amorphous semiconductor deposited on the surface of an underlying substrate. The first layer is polycrystallized by applying an energy beam to the first layer. A second layer is deposited on the surface of the polycrystallized first layer, the second layer being made of amorphous semiconductor having the same composition as the first layer or polycrystalline semiconductor. Crystallinity of the second layer is changed by applying an energy beam to the second layer. The substrate may be heated when the energy beam is applied to the second layer.Type: GrantFiled: November 21, 1997Date of Patent: October 19, 1999Assignee: Fujitsu LimitedInventors: Akito Hara, Satoshi Murakami, Kuninori Kitahara
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Patent number: 5484664Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminium arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.Type: GrantFiled: January 21, 1994Date of Patent: January 16, 1996Assignee: Fujitsu LimitedInventors: Kuninori Kitahara, Nobuyuki Ohtsuka, Masashi Ozeki
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Patent number: 5300186Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminium arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.Type: GrantFiled: April 7, 1992Date of Patent: April 5, 1994Assignee: Fujitsu LimitedInventors: Kuninori Kitahara, Nobuyuki Ohtsuka, Masashi Ozeki
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Patent number: 5130269Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminum arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.Type: GrantFiled: April 25, 1989Date of Patent: July 14, 1992Assignee: Fujitsu LimitedInventors: Kuninori Kitahara, Nobuyuki Ohtsuka, Masashi Ozeki